Inventor · disambiguated record
Narasimha R. Adiga
Also filed as: ADIGA NARASIMHA · ADIGA NARASIMHA R · ADIGA NARASIMHA RAMAKRISHNA
13 granted patents·27 citations·filing 2007–2019
87Inventor score
Top patents by PatentIndex Score
13 records- 0192US8345816B1RAM-based event counters using transpositionIBM·Filed 2011·Granted Jan 1, 2013·17 cites·25 claims
- 0283US9513909B2Variable updates of branch prediction statesIBM·Filed 2016·Granted Dec 6, 2016·3 cites·1 claims
- 0378US9547495B1Pattern based branch predictionIBM·Filed 2016·Granted Jan 17, 2017·2 cites·1 claims
- 0472US11163661B2Test case generation for a hardware state spaceIBM·Filed 2019·Granted Nov 2, 2021·1 cites·20 claims
- 0565US9690587B2Variable updates of branch prediction statesIBM·Filed 2014·Granted Jun 27, 2017·1 cites·17 claims
- 0664US8693615B2RAM-based event counters using transpositionIBM·Filed 2012·Granted Apr 8, 2014·1 cites·18 claims
- 0762US9304883B2Testing optimization of microprocessor table functionsIBM·Filed 2014·Granted Apr 5, 2016·2 cites·7 claims
- 0856US9697001B2Variable updates of branch prediction statesIBM·Filed 2016·Granted Jul 4, 2017·0 cites·1 claims
- 0955US9733946B2Pattern based branch predictionIBM·Filed 2016·Granted Aug 15, 2017·0 cites·1 claims
- 1053US9934041B2Pattern based branch predictionIBM·Filed 2015·Granted Apr 3, 2018·0 cites·20 claims
- 1151US11200125B2Feedback from higher-level verification to improve unit verification effectivenessIBM·Filed 2019·Granted Dec 14, 2021·0 cites·20 claims
- 1244US9760462B2Testing optimization of microprocessor table functionsIBM·Filed 2014·Granted Sep 12, 2017·0 cites·13 claims
- 1340US8151177B2Methods and arrangements for partial word stores in networking adaptersADIGA NARASIMHA RAMAKRISHNA·Filed 2007·Granted Apr 3, 2012·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →