Inventor · disambiguated record
George F. Carney
Also filed as: CARNEY GEORGE · CARNEY GEORGE F
12 granted patents·456 citations·filing 1989–2021
92Inventor score
Top patents by PatentIndex Score
12 records- 0194US6077726AMethod and apparatus for stress relief in solder bump formation on a semiconductor deviceMOTOROLA INC·Filed 1998·Granted Jun 20, 2000·225 cites·13 claims
- 0294US5480835AElectrical interconnect and method for forming the sameMOTOROLA INC·Filed 1994·Granted Jan 2, 1996·107 cites·20 claims
- 0385US6429531B1Method and apparatus for manufacturing an interconnect structureMOTOROLA INC·Filed 2000·Granted Aug 6, 2002·52 cites·11 claims
- 0476US6413878B1Method of manufacturing electronic componentsMOTOROLA INC·Filed 2000·Granted Jul 2, 2002·12 cites·11 claims
- 0571US4877482ANitride removal methodMOTOROLA INC·Filed 1989·Granted Oct 31, 1989·17 cites·15 claims
- 0665US6436300B2Method of manufacturing electronic componentsMOTOROLA INC·Filed 1998·Granted Aug 20, 2002·16 cites·8 claims
- 0757US6726826B2Method of manufacturing a semiconductor componentMOTOROLA INC·Filed 2001·Granted Apr 27, 2004·6 cites·6 claims
- 0846US4975146APlasma removal of unwanted materialMOTOROLA INC·Filed 1989·Granted Dec 4, 1990·9 cites·8 claims
- 0938US5075258AMethod for plating tab leads in an assembled semiconductor packageMOTOROLA INC·Filed 1990·Granted Dec 24, 1991·11 cites·9 claims
- 1036USD1101516SBar toolPOOR MANS KITCHEN LLC·Filed 2021·Granted Nov 11, 2025·0 cites·1 claims
- 1132USD900560SBar toolPOOR MANS KITCHEN LLC·Filed 2018·Granted Nov 3, 2020·1 cites·1 claims
- 1226US6361675B1Method of manufacturing a semiconductor component and plating tool thereforMOTOROLA INC·Filed 1999·Granted Mar 26, 2002·0 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →