Inventor · disambiguated record
Michaela Blott
Also filed as: BLOTT MICHAELA
15 granted patents·1 pending application·121 citations·filing 2008–2023
92Inventor score
Top patents by PatentIndex Score
16 records- 0194US9503093B2Virtualization of programmable integrated circuitsXILINX INC·Filed 2014·Granted Nov 22, 2016·25 cites·20 claims
- 0288US9323457B2Memory arrangement for implementation of high-throughput key-value storesXILINX INC·Filed 2013·Granted Apr 26, 2016·12 cites·20 claims
- 0388US9092305B1Memory interface circuitBLOTT MICHAELA·Filed 2012·Granted Jul 28, 2015·20 cites·20 claims
- 0487US9519486B1Method of and device for processing data using a pipeline of processing blocksXILINX INC·Filed 2012·Granted Dec 13, 2016·17 cites·11 claims
- 0585US10089577B2Binary neural networks on progammable integrated circuitsXILINX INC·Filed 2016·Granted Oct 2, 2018·9 cites·20 claims
- 0682US10482054B1AXI-CAPI adapterXILINX INC·Filed 2016·Granted Nov 19, 2019·5 cites·20 claims
- 0779US10482129B1Pipelined database processing circuit and methodXILINX INC·Filed 2017·Granted Nov 19, 2019·4 cites·20 claims
- 0879US9711194B2Circuits for and methods of controlling the operation of a hybrid memory systemXILINX INC·Filed 2015·Granted Jul 18, 2017·3 cites·19 claims
- 0978US11615300B1System and method for implementing neural networks in integrated circuitsXILINX INC·Filed 2018·Granted Mar 28, 2023·6 cites·20 claims
- 1077US10523596B1Circuits for and methods of merging streams of data to generate sorted output dataXILINX INC·Filed 2015·Granted Dec 31, 2019·6 cites·20 claims
- 1176US10839286B2System and method for implementing neural networks in integrated circuitsXILINX INC·Filed 2017·Granted Nov 17, 2020·4 cites·20 claims
- 1273US7822066B1Processing variable size fields of the packets of a communication protocolXILINX INC·Filed 2008·Granted Oct 26, 2010·5 cites·20 claims
- 1371US11934932B1Error aware module redundancy for machine learningXILINX INC·Filed 2020·Granted Mar 19, 2024·1 cites·20 claims
- 1470US10320918B1Data-flow architecture for a TCP offload engineXILINX INC·Filed 2014·Granted Jun 11, 2019·4 cites·20 claims
- 1555US2025111231A1Pruning of technology-mapped machine learning-related circuits at bit-level granularityXILINX INC·Filed 2023·Application pending·0 cites
- 1648US12067484B2Learning neural networks of programmable device blocks directly with backpropagationXILINX INC·Filed 2019·Granted Aug 20, 2024·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →