Inventor · disambiguated record
Dae-Kwon Kang
Also filed as: KANG DAE KWON
7 granted patents·3 pending applications·48 citations·filing 2005–2023
81Inventor score
Top patents by PatentIndex Score
10 records- 0194US7297584B2Methods of fabricating semiconductor devices having a dual stress linerSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Nov 20, 2007·34 cites·12 claims
- 0287US10216082B2Layout design system, system and method for fabricating mask pattern using the sameKANG DAE KWON·Filed 2016·Granted Feb 26, 2019·5 cites·19 claims
- 0385US9874810B2Layout decomposition methods and systemsSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jan 23, 2018·3 cites·20 claims
- 0475US9652578B2Layout design methods and layout design systems for performing the layout design methodsSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted May 16, 2017·2 cites·20 claims
- 0573US9836565B2Electronic design automation method and apparatus thereofSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Dec 5, 2017·2 cites·18 claims
- 0670US2024247123A1Foaming agent composition for polyurethane and method of preparing polyurethane foam using sameSEHO INC·Filed 2023·Application pending·0 cites
- 0768US9841672B2Method of decomposing layout of semiconductor device for quadruple patterning technology process and method of manufacturing semiconductor device using the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Dec 12, 2017·1 cites·18 claims
- 0862US9928330B2Method of decomposing layout of semiconductor device and method of manufacturing semiconductor device using the sameKANG DAE KWON·Filed 2015·Granted Mar 27, 2018·1 cites·17 claims
- 0951US2008029823A1Semiconductor Device Having a Dual Stress Liner and Light Exposure Apparatus for Forming the Dual Stress LinerCHARTERED SEMICONDUCTOR MFG·Filed 2007·Application pending·0 cites
- 1040US2009014807A1Dual stress liners for integrated circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →