Inventor · disambiguated record
Leslie E. Cline
Also filed as: CLINE LESLIE E
25 granted patents·3 pending applications·594 citations·filing 1994–2011
97Inventor score
Top patents by PatentIndex Score
28 records- 0192US7281074B2Method and apparatus to quiesce USB activities using interrupt descriptor caching and asynchronous notificationsINTEL CORP·Filed 2005·Granted Oct 9, 2007·31 cites·20 claims
- 0291US7523327B2System and method of coherent data transfer during processor idle statesINTEL CORP·Filed 2005·Granted Apr 21, 2009·19 cites·19 claims
- 0390US6704877B2Dynamically changing the performance of devices in a computer platformINTEL CORP·Filed 2000·Granted Mar 9, 2004·68 cites·21 claims
- 0489US7149909B2Power management for an integrated graphics deviceINTEL CORP·Filed 2002·Granted Dec 12, 2006·71 cites·18 claims
- 0589US6738068B2Entering and exiting power managed states without disrupting accelerated graphics port transactionsINTEL CORP·Filed 2000·Granted May 18, 2004·57 cites·12 claims
- 0686US6988211B2System and method for selecting a frequency and voltage combination from a table using a selection field and a read-only limit fieldINTEL CORP·Filed 2000·Granted Jan 17, 2006·45 cites·23 claims
- 0785US6976181B2Method and apparatus for enabling a low power mode for a processorINTEL CORP·Filed 2001·Granted Dec 13, 2005·34 cites·25 claims
- 0878US6748548B2Computer peripheral device that remains operable when central processor operations are suspendedINTEL CORP·Filed 2000·Granted Jun 8, 2004·33 cites·43 claims
- 0974US6871252B1Method and apparatus for logical detach for a hot-plug-in data busINTEL CORP·Filed 2000·Granted Mar 22, 2005·20 cites·18 claims
- 1073US7343502B2Method and apparatus for dynamic DLL powerdown and memory self-refreshINTEL CORP·Filed 2004·Granted Mar 11, 2008·17 cites·27 claims
- 1173US5630171ATranslating from a PIO protocol to DMA protocol with a peripheral interface circuitCIRRUS LOGIC INC·Filed 1996·Granted May 13, 1997·44 cites·7 claims
- 1272US7373534B2Reducing storage data transfer interference with processor power managementINTEL CORP·Filed 2005·Granted May 13, 2008·5 cites·14 claims
- 1372US7340550B2USB schedule prefetcher for low powerINTEL CORP·Filed 2004·Granted Mar 4, 2008·19 cites·26 claims
- 1471US7225347B2Method and apparatus for enabling a low power mode for a processorINTEL CORP·Filed 2005·Granted May 29, 2007·4 cites·16 claims
- 1571US6802018B2Method and apparatus to directly access a peripheral device when central processor operations are suspendedINTEL CORP·Filed 2000·Granted Oct 5, 2004·21 cites·35 claims
- 1670US9170626B2Performance reduction limit for power consumption deviceCLINE LESLIE E·Filed 2011·Granted Oct 27, 2015·4 cites·16 claims
- 1764US7472289B2Audio noise mitigation for power state transitionsINTEL CORP·Filed 2004·Granted Dec 30, 2008·9 cites·25 claims
- 1861US5603052AInterface circuit for transferring data between host and mass storage by assigning address in the host memory space and placing the address on the busCIRRUS LOGIC INC·Filed 1995·Granted Feb 11, 1997·25 cites·13 claims
- 1961US5592682AInterface circuit for transferring data between host device and mass storage device in response to designated address in host memory space assigned as data portCIRRUS LOGIC INC·Filed 1994·Granted Jan 7, 1997·23 cites·7 claims
- 2059US7069367B2Method and apparatus for avoiding race condition with edge-triggered interruptsINTEL CORP·Filed 2000·Granted Jun 27, 2006·6 cites·12 claims
- 2158US7884499B2Intervention of independent self-regulation of power consumption devicesINTEL CORP·Filed 2008·Granted Feb 8, 2011·1 cites·16 claims
- 2257US5826107AMethod and apparatus for implementing a DMA timeout counter featureCIRRUS LOGIC INC·Filed 1994·Granted Oct 20, 1998·19 cites·11 claims
- 2352US2009193274A1System And Method of Coherent Data Transfer During Processor Idle StatesINTEL CORP·Filed 2009·Application pending·0 cites
- 2451US5655145APeripheral interface circuit which snoops commands to determine when to perform DMA protocol translationCIRRUS LOGIC INC·Filed 1994·Granted Aug 5, 1997·14 cites·11 claims
- 2550US7231468B2Future activity list for peripheral bus host controllerINTEL CORP·Filed 2003·Granted Jun 12, 2007·3 cites·27 claims
- 2647US7027057B2Entering and exiting power managed states without disrupting accelerated graphics port transactionsINTEL CORP·Filed 2003·Granted Apr 11, 2006·2 cites·8 claims
- 2743US2005044408A1Low pin count docking architecture for a trusted platformFiled 2003·Application pending·0 cites
- 2839US2002124125A1Method and apparatus to permit a peripheral device to become the default system bus masterFiled 2000·Application pending·0 cites
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