Inventor · disambiguated record
Nayak Ratnakar Aravind
Also filed as: ARAVIND NAYAK RATNAKAR
12 granted patents·4 pending applications·26 citations·filing 2008–2016
85Inventor score
Files withAVAGO TECHNOLOGIES GENERAL IP5ARAVIND NAYAK RATNAKAR3LSI CORP3BAILEY JAMES A2AGERE SYSTEMS INC1
Top patents by PatentIndex Score
16 records- 0190US9129646B2Array-reader based magnetic recording systems with mixed synchronizationLSI CORP·Filed 2013·Granted Sep 8, 2015·17 cites·20 claims
- 0278US8462455B2Systems and methods for improved servo data operationARAVIND NAYAK RATNAKAR·Filed 2008·Granted Jun 11, 2013·4 cites·20 claims
- 0370US8730077B2Read channel with selective oversampled analog to digital conversionBAILEY JAMES A·Filed 2011·Granted May 20, 2014·2 cites·20 claims
- 0465US8498073B2Systems and methods for adaptive baseline compensationARAVIND NAYAK RATNAKAR·Filed 2009·Granted Jul 30, 2013·1 cites·20 claims
- 0557US8604960B2Oversampled data processing circuit with multiple detectorsLIAO YU·Filed 2012·Granted Dec 10, 2013·2 cites·20 claims
- 0655US8749906B2Systems and methods for improved servo data operationAGERE SYSTEMS INC·Filed 2013·Granted Jun 10, 2014·0 cites·20 claims
- 0750US9224421B2Non-decision directed magnetoresistive asymetry estimationLSI CORP·Filed 2014·Granted Dec 29, 2015·0 cites·18 claims
- 0849US8976471B1Systems and methods for two stage tone reductionLSI CORP·Filed 2013·Granted Mar 10, 2015·0 cites·24 claims
- 0944US8874633B2Determining coefficients for digital low pass filter given cutoff and boost values for corresponding analog versionARAVIND NAYAK RATNAKAR·Filed 2011·Granted Oct 28, 2014·0 cites·29 claims
- 1039US9431051B1Systems and methods for acquisition phase gain modificationAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Granted Aug 30, 2016·0 cites·20 claims
- 1139US8467141B2Read channel with oversampled analog to digital conversionBAILEY JAMES A·Filed 2011·Granted Jun 18, 2013·0 cites·26 claims
- 1236US9734860B2Systems and methods for a data processing using integrated filter circuitAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Granted Aug 15, 2017·0 cites·20 claims
- 1336US2016350463A1Circuit Modeling With Partitioned Input RangesAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Application pending·0 cites
- 1436US2013050005A1Read Channel With Oversampled Analog To Digital Conversion And Parallel Data DetectorsLIU JINGFENG·Filed 2011·Application pending·0 cites
- 1535US2017033952A1Systems and Methods for Back Channel Adaptation in a Serial TransferAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Application pending·0 cites
- 1634US2017288915A1Systems and Methods for Mitigating Over-Equalization in a Short ChannelAVAGO TECHNOLOGIES GENERAL IP·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →