Inventor · disambiguated record
Stephen P. Thompson
Also filed as: THOMPSON STEPHEN · THOMPSON STEPHEN M · THOMPSON STEPHEN P · THOMPSON STEPHEN PATRICK
22 granted patents·3 pending applications·332 citations·filing 1989–2012
96Inventor score
Top patents by PatentIndex Score
25 records- 0179US9104593B2Filtering requests for a translation lookaside bufferTHOMPSON STEPHEN P·Filed 2012·Granted Aug 11, 2015·6 cites·10 claims
- 0279US7536510B1Hierarchical MRU policy for data cacheADVANCED MICRO DEVICES INC·Filed 2005·Granted May 19, 2009·10 cites·16 claims
- 0376US5600347AHorizontal image expansion system for flat panel displaysIBM·Filed 1993·Granted Feb 4, 1997·47 cites·21 claims
- 0475US9390018B2Data cache prefetch hintsMCCAULEY DONALD W·Filed 2012·Granted Jul 12, 2016·4 cites·18 claims
- 0574US9116815B2Data cache prefetch throttleMCCAULEY DONALD W·Filed 2012·Granted Aug 25, 2015·4 cites·23 claims
- 0674US7930484B2System for restricted cache access during data transfers and method thereofADVANCED MICRO DEVICES INC·Filed 2005·Granted Apr 19, 2011·8 cites·16 claims
- 0772US5617118AMode dependent minimum FIFO fill level controls processor access to video memoryIBM·Filed 1996·Granted Apr 1, 1997·42 cites·8 claims
- 0869US8856451B2Method and apparatus for adapting aggressiveness of a pre-fetcherTHOMPSON STEPHEN P·Filed 2010·Granted Oct 7, 2014·3 cites·28 claims
- 0967US8933947B2Reading a local memory of a processing unitGLEN DAVID I J·Filed 2010·Granted Jan 13, 2015·1 cites·15 claims
- 1067US8341316B2Method and apparatus for controlling a translation lookaside bufferKAPLAN DAVID·Filed 2010·Granted Dec 25, 2012·2 cites·24 claims
- 1164US5388250AApparatus and method for guaranteeing strobe separation timingIBM·Filed 1993·Granted Feb 7, 1995·43 cites·24 claims
- 1263US9189417B2Speculative tablewalk promotionADVANCED MICRO DEVICES INC·Filed 2012·Granted Nov 17, 2015·1 cites·26 claims
- 1363US7536511B2CPU mode-based cache allocation for image dataADVANCED MICRO DEVICES INC·Filed 2006·Granted May 19, 2009·2 cites·18 claims
- 1461US5444855ASystem for guaranteed CPU bus access by I/O devices monitoring separately predetermined distinct maximum non CPU bus activity and inhibiting I/O devices thereofIBM·Filed 1992·Granted Aug 22, 1995·39 cites·20 claims
- 1557US5477242ADisplay adapter for virtual VGA support in XGA native modeIBM·Filed 1994·Granted Dec 19, 1995·21 cites·21 claims
- 1655US5590260AMethod and apparatus for optimizing the display of fonts in a data processing systemIBM·Filed 1993·Granted Dec 31, 1996·23 cites·35 claims
- 1753US2004064406A1Transaction authenticationFiled 2001·Application pending·0 cites
- 1850US5001652AMemory arbitration for video subsystemsIBM·Filed 1989·Granted Mar 19, 1991·13 cites·6 claims
- 1949US5392404ABus control preemption logicIBM·Filed 1992·Granted Feb 21, 1995·21 cites·20 claims
- 2047US5329634AComputer system with automatic adapter card setupIBM·Filed 1991·Granted Jul 12, 1994·19 cites·9 claims
- 2144US2008052467A1System for restricted cache access during information transfers and method thereofADVANCED MICRO DEVICES INC·Filed 2006·Application pending·0 cites
- 2242US2012096226A1Two level replacement scheme optimizes for performance, power, and areaTHOMPSON STEPHEN P·Filed 2010·Application pending·0 cites
- 2334US5266933AMethod and apparatus for displaying a screen separator lineIBM·Filed 1993·Granted Nov 30, 1993·6 cites·15 claims
- 2432US5771371AMethod and apparatus for optimizing the display of forms in a data processing systemIBM·Filed 1996·Granted Jun 23, 1998·5 cites·20 claims
- 2532US5280588AMultiple input/output devices having shared address spaceIBM·Filed 1992·Granted Jan 18, 1994·12 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →