Inventor · disambiguated record
Stephen T. Flannagan
Also filed as: FLANNAGAN STEPHEN · FLANNAGAN STEPHEN T
42 granted patents·1,587 citations·filing 1980–2001
98Inventor score
Top patents by PatentIndex Score
42 records- 0198US4807191ARedundancy for a block-architecture memoryMOTOROLA INC·Filed 1988·Granted Feb 21, 1989·164 cites·8 claims
- 0296US5440514AWrite control for a memory using a delay locked loopMOTOROLA INC·Filed 1994·Granted Aug 8, 1995·150 cites·21 claims
- 0395US5440515ADelay locked loop for detecting the phase difference of two signals having different frequenciesMOTOROLA INC·Filed 1994·Granted Aug 8, 1995·117 cites·9 claims
- 0494US5402389ASynchronous memory having parallel output data pathsMOTOROLA INC·Filed 1994·Granted Mar 28, 1995·135 cites·24 claims
- 0592US5384737APipelined memory having synchronous and asynchronous operating modesMOTOROLA INC·Filed 1994·Granted Jan 24, 1995·95 cites·20 claims
- 0691US5477176APower-on reset circuit for preventing multiple word line selections during power-up of an integrated circuit memoryMOTOROLA INC·Filed 1994·Granted Dec 19, 1995·73 cites·19 claims
- 0790US4449207AByte-wide dynamic RAM with multiplexed internal busesINTEL CORP·Filed 1982·Granted May 15, 1984·75 cites·15 claims
- 0888US6157583AIntegrated circuit memory having a fuse detect circuit and method thereforMOTOROLA INC·Filed 1999·Granted Dec 5, 2000·72 cites·20 claims
- 0988US4698788AMemory architecture with sub-arraysMOTOROLA INC·Filed 1985·Granted Oct 6, 1987·59 cites·5 claims
- 1083US4468759ATesting method and apparatus for dramINTEL CORP·Filed 1982·Granted Aug 28, 1984·36 cites·11 claims
- 1182US4406013AMultiple bit output dynamic random-access memoryINTEL CORP·Filed 1980·Granted Sep 20, 1983·34 cites·4 claims
- 1281US5610543ADelay locked loop for detecting the phase difference of two signals having different frequenciesMOTOROLA INC·Filed 1995·Granted Mar 11, 1997·45 cites·20 claims
- 1381US5268866AMemory with column redundancy and localized column redundancy control signalsMOTOROLA INC·Filed 1992·Granted Dec 7, 1993·57 cites·20 claims
- 1480US4547867AMultiple bit dynamic random-access memoryINTEL CORP·Filed 1983·Granted Oct 15, 1985·29 cites·5 claims
- 1579US4658381ABit line precharge on a column address changeMOTOROLA INC·Filed 1985·Granted Apr 14, 1987·36 cites·10 claims
- 1679US4644196ATri-state differential amplifierMOTOROLA INC·Filed 1985·Granted Feb 17, 1987·37 cites·8 claims
- 1774US4453237AMultiple bit output dynamic random-access memoryINTEL CORP·Filed 1983·Granted Jun 5, 1984·22 cites·4 claims
- 1873US6473349B1Cascode sense AMP and column select circuit and method of operationMOTOROLA INC·Filed 2001·Granted Oct 29, 2002·20 cites·17 claims
- 1971US4636991ASummation of address transition signalsMOTOROLA INC·Filed 1985·Granted Jan 13, 1987·27 cites·12 claims
- 2068US5426381ALatching ECL to CMOS input buffer circuitMOTOROLA INC·Filed 1994·Granted Jun 20, 1995·21 cites·20 claims
- 2165US4630239AChip select speed-up circuit for a memoryMOTOROLA INC·Filed 1985·Granted Dec 16, 1986·20 cites·12 claims
- 2264US4716550AHigh performance output driverMOTOROLA INC·Filed 1986·Granted Dec 29, 1987·21 cites·8 claims
- 2360US4661931AAsynchronous row and column controlMOTOROLA INC·Filed 1985·Granted Apr 28, 1987·17 cites·17 claims
- 2459US5184033ARegulated BiCMOS output bufferMOTOROLA INC·Filed 1991·Granted Feb 2, 1993·15 cites·15 claims
- 2559US5059829ALogic level shifting circuit with minimal delayMOTOROLA INC·Filed 1990·Granted Oct 22, 1991·16 cites·12 claims
- 2657US5485110AECL differential multiplexing circuitMOTOROLA INC·Filed 1994·Granted Jan 16, 1996·13 cites·18 claims
- 2756US5670815ALayout for noise reduction on a reference voltageMOTOROLA INC·Filed 1994·Granted Sep 23, 1997·25 cites·11 claims
- 2855US5043602AHigh speed logic circuit with reduced quiescent currentMOTOROLA INC·Filed 1990·Granted Aug 27, 1991·12 cites·11 claims
- 2955US4644197AReduced power sense amplifierMOTOROLA INC·Filed 1985·Granted Feb 17, 1987·14 cites·17 claims
- 3053US4763303AWrite-drive data controllerMOTOROLA INC·Filed 1986·Granted Aug 9, 1988·13 cites·9 claims
- 3152US4716302AIdentity circuit for an integrated circuit using a fuse and transistor enabled by a power-on reset signalMOTOROLA INC·Filed 1986·Granted Dec 29, 1987·18 cites·20 claims
- 3249US4964083ANon-address transition detection memory with improved access timeMOTOROLA INC·Filed 1989·Granted Oct 16, 1990·11 cites·10 claims
- 3348US5293081ADriver circuit for output buffersMOTOROLA INC·Filed 1992·Granted Mar 8, 1994·17 cites·15 claims
- 3448US5287314ABICMOS sense amplifier with reverse bias protectionMOTOROLA INC·Filed 1992·Granted Feb 15, 1994·13 cites·22 claims
- 3547US6044036ABuffer circuit, memory device, and integrated circuit for receiving digital signalsMOTOROLA INC·Filed 1998·Granted Mar 28, 2000·11 cites·10 claims
- 3647US4807198AMemory input buffer with hysteresis and dc marginMOTOROLA INC·Filed 1987·Granted Feb 21, 1989·10 cites·12 claims
- 3746US4928268AMemory using distributed data line loadingMOTOROLA INC·Filed 1989·Granted May 22, 1990·9 cites·14 claims
- 3840US5416744AMemory having bit line load with automatic bit line precharge and equalizationMOTOROLA INC·Filed 1994·Granted May 16, 1995·7 cites·17 claims
- 3940US5173877ABICMOS combined bit line load and write gate for a memoryMOTOROLA INC·Filed 1990·Granted Dec 22, 1992·9 cites·6 claims
- 4038US6031408ASquare-law clamping circuitMOTOROLA INC·Filed 1993·Granted Feb 29, 2000·9 cites·7 claims
- 4135US5256917AECL logic gate with voltage protectionMOTOROLA INC·Filed 1992·Granted Oct 26, 1993·3 cites·20 claims
- 4230US4763306ACircuit for enabling a transmission gate in response to predecoded signalsMOTOROLA INC·Filed 1986·Granted Aug 9, 1988·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →