Inventor · disambiguated record
Suwei Chen
Also filed as: CHEN SUWEI
5 granted patents·86 citations·filing 2004–2006
82Inventor score
Top patents by PatentIndex Score
5 records- 0188US7135899B1System and method for reducing skew in complementary signals that can be used to synchronously clock a double data rate outputCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Nov 14, 2006·30 cites·13 claims
- 0284US7545194B2Programmable delay for clock phase error correctionINTEL CORP·Filed 2006·Granted Jun 9, 2009·13 cites·15 claims
- 0376US7339403B2Clock error detection circuits, methods, and systemsINTEL CORP·Filed 2006·Granted Mar 4, 2008·9 cites·20 claims
- 0472US7132854B1Data path configurable for multiple clocking arrangementsCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Nov 7, 2006·19 cites·19 claims
- 0572US7019576B1Delay circuit that scales with clock cycle timeCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Mar 28, 2006·15 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →