Inventor · disambiguated record
Dileep Bhandarkar
Also filed as: BHANDARKAR DILEEP · BHANDARKAR DILEEP P · BHANDARKAR DILEEP PANDURANG
15 granted patents·783 citations·filing 1974–2004
95Inventor score
Top patents by PatentIndex Score
15 records- 0196US4047163AFault-tolerant cell addressable arrayTEXAS INSTRUMENTS INC·Filed 1975·Granted Sep 6, 1977·64 cites·53 claims
- 0290US7249268B2Method for performing performance optimization operations for a processor having a plurality of processor cores in response to a stall conditionINTEL CORP·Filed 2004·Granted Jul 24, 2007·66 cites·11 claims
- 0387US5063497AApparatus and method for recovering from missing page faults in vector data processing operationsDIGITAL EQUIPMENT CORP·Filed 1987·Granted Nov 5, 1991·96 cites·32 claims
- 0478US5008812AContext switching method and apparatus for use in a vector processing systemDIGITAL EQUIPMENT CORP·Filed 1988·Granted Apr 16, 1991·83 cites·13 claims
- 0576US5113521AMethod and apparatus for handling faults of vector instructions causing memory management exceptionsDIGITAL EQUIPMENT CORP·Filed 1991·Granted May 12, 1992·79 cites·25 claims
- 0673US5043867AException reporting mechanism for a vector processorDIGITAL EQUIPMENT CORP·Filed 1988·Granted Aug 27, 1991·52 cites·27 claims
- 0772US5341482AMethod for synchronization of arithmetic exceptions in central processing units having pipelined execution units simultaneously executing instructionsDIGITAL EQUIPMENT CORP·Filed 1992·Granted Aug 23, 1994·59 cites·27 claims
- 0870US5218712AProviding a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruptionDIGITAL EQUIPMENT CORP·Filed 1990·Granted Jun 8, 1993·55 cites·23 claims
- 0969US5317717AApparatus and method for main memory unit protection using access and fault logic signalsDIGITAL EQUIPMENT CORP·Filed 1992·Granted May 31, 1994·51 cites·20 claims
- 1069US5148544AApparatus and method for control of asynchronous program interrupt events in a data processing systemDIGITAL EQUIPMENT CORP·Filed 1991·Granted Sep 15, 1992·55 cites·22 claims
- 1169US4949250AMethod and apparatus for executing instructions for a vector processing systemDIGITAL EQUIPMENT CORP·Filed 1988·Granted Aug 14, 1990·40 cites·13 claims
- 1265US4648030ACache invalidation mechanism for multiprocessor systemsDIGITAL EQUIPMENT CORP·Filed 1983·Granted Mar 3, 1987·32 cites·13 claims
- 1359US5291581AApparatus and method for synchronization of access to main memory signal groups in a multiprocessor data processing systemDIGITAL EQUIPMENT CORP·Filed 1992·Granted Mar 1, 1994·35 cites·24 claims
- 1441US5278840AApparatus and method for data induced condition signallingDIGITAL EQUIPMENT CORP·Filed 1993·Granted Jan 11, 1994·12 cites·20 claims
- 1540US3999172AMagnetic domain memoryTEXAS INSTRUMENTS INC·Filed 1974·Granted Dec 21, 1976·4 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →