Inventor · disambiguated record
Ih-Chin Chen
Also filed as: CHEN IH-CHIN
19 granted patents·2 pending applications·622 citations·filing 1988–2004
96Inventor score
Top patents by PatentIndex Score
21 records- 0193US6287924B1Integrated circuit and methodTEXAS INSTRUMENTS INC·Filed 1999·Granted Sep 11, 2001·118 cites·2 claims
- 0289US4882649ANitride/oxide/nitride capacitor dielectricTEXAS INSTRUMENTS INC·Filed 1988·Granted Nov 21, 1989·58 cites·9 claims
- 0386US5917219ASemiconductor devices with pocket implant and counter dopingTEXAS INSTRUMENTS INC·Filed 1996·Granted Jun 29, 1999·58 cites·9 claims
- 0483US6960499B2Dual-counterdoped channel field effect transistor and methodTEXAS INSTRUMENTS INC·Filed 2004·Granted Nov 1, 2005·30 cites·9 claims
- 0583US5739569ANon-volatile memory cell with oxide and nitride tunneling layersTEXAS INSTRUMENTS INC·Filed 1996·Granted Apr 14, 1998·58 cites·20 claims
- 0681US6313010B1Integrated circuit insulator and methodTEXAS INSTRUMENTS INC·Filed 1997·Granted Nov 6, 2001·62 cites·4 claims
- 0778US5909628AReducing non-uniformity in a refill layer thickness for a semiconductor deviceTEXAS INSTRUMENTS INC·Filed 1997·Granted Jun 1, 1999·54 cites·31 claims
- 0875US4888820AStacked insulating film including yttrium oxideTEXAS INSTRUMENTS INC·Filed 1988·Granted Dec 19, 1989·31 cites·23 claims
- 0970US6835622B2Gate electrode doping method for forming semiconductor integrated circuit microelectronic fabrication with varying effective gate dielectric layer thicknessesTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Dec 28, 2004·15 cites·8 claims
- 1068US5894145AMultiple substrate bias random access memory deviceTEXAS INSTRUMENTS INC·Filed 1997·Granted Apr 13, 1999·23 cites·23 claims
- 1166US6228725B1Semiconductor devices with pocket implant and counter dopingTEXAS INSTRUMENTS INC·Filed 1999·Granted May 8, 2001·21 cites·3 claims
- 1264US6420236B1Hydrogen treatment for threshold voltage shift of metal gate MOSFET devicesTEXAS INSTRUMENTS INC·Filed 2000·Granted Jul 16, 2002·12 cites·23 claims
- 1363US5274261AIntegrated circuit degradation resistant structureTEXAS INSTRUMENTS INC·Filed 1992·Granted Dec 28, 1993·22 cites·7 claims
- 1456US6147384AMethod for forming planar field effect transistors with source and drain an insulator and device constructed therefromTEXAS INSTRUMENTS INC·Filed 1999·Granted Nov 14, 2000·16 cites·18 claims
- 1551US5595925AMethod for fabricating a multiple well structure for providing multiple substrate bias for DRAM device formed thereinTEXAS INSTRUMENTS INC·Filed 1994·Granted Jan 21, 1997·11 cites·4 claims
- 1650US6143625AProtective liner for isolation trench side walls and methodTEXAS INSTRUMENTS INC·Filed 1998·Granted Nov 7, 2000·15 cites·5 claims
- 1739US5913135AMethod for forming planar field effect transistors with source and drain on oxide and device constructed therefromTEXAS INSTRUMENTS INC·Filed 1997·Granted Jun 15, 1999·8 cites·12 claims
- 1838US6306724B1Method of forming a trench isolation structure in a stack trench capacitor fabrication processTEXAS INSTRUMENTS INC·Filed 1995·Granted Oct 23, 2001·8 cites·8 claims
- 1933US2002076885A1Low resistance complementary metal oxide (CMOS) transistor and methodFiled 2000·Application pending·0 cites
- 2032US5548548APass transistor for a 256 megabit dram with negatively biased substrateTEXAS INSTRUMENTS INC·Filed 1994·Granted Aug 20, 1996·2 cites·13 claims
- 2129US2001038131A1Using an elevated silicide as diffusion source for deep sub-micron and beyond cmosFiled 1999·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →