Inventor · disambiguated record
Kuei-Ying Lee
Also filed as: LEE KUEI-YING
9 granted patents·418 citations·filing 1994–2002
91Inventor score
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9 records- 0194US6214698B1Shallow trench isolation methods employing gap filling doped silicon oxide dielectric layerTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Apr 10, 2001·108 cites·37 claims
- 0280US6129091AMethod for cleaning silicon wafers with deep trenchesTAIWAN SEMICONDUCTOR MANFACTUR·Filed 1996·Granted Oct 10, 2000·61 cites·12 claims
- 0380US6110793AMethod for making a trench isolation having a conformal liner oxide and top and bottom rounded corners for integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Aug 29, 2000·69 cites·20 claims
- 0476US5930644AMethod of forming a shallow trench isolation using oxide slope etchingTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Jul 27, 1999·50 cites·19 claims
- 0574US6808985B1Products derived from embedded flash/EEPROM productsTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Oct 26, 2004·21 cites·31 claims
- 0674US6350662B1Method to reduce defects in shallow trench isolations by post liner annealTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Feb 26, 2002·45 cites·15 claims
- 0765US6015757AMethod of oxide etching with high selectivity to silicon nitride by using polysilicon layerTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Jan 18, 2000·30 cites·20 claims
- 0860US5521119APost treatment of tungsten etching backTAIWAN SEMICONDUCTOR MFG·Filed 1994·Granted May 28, 1996·29 cites·20 claims
- 0935US6046062AMethod to monitor the kink effectTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Apr 4, 2000·5 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →