Inventor · disambiguated record
Freeman Y. Zhong
Also filed as: ZHONG FREEMAN Y · ZHONG FREEMAN YINGQUAN
13 granted patents·1 pending application·176 citations·filing 2006–2014
91Inventor score
Top patents by PatentIndex Score
14 records- 0196US8487795B1Time-interleaved track-and-hold circuit using distributed global sine-wave clockJIANG TAO·Filed 2012·Granted Jul 16, 2013·39 cites·22 claims
- 0295US8508308B2Automatic frequency calibration of a multi-LCVCO phase locked loop with adaptive thresholds and programmable center control voltageDONG YIKUI JEN·Filed 2011·Granted Aug 13, 2013·32 cites·18 claims
- 0391US8649476B2Adjusting sampling phase in a baud-rate CDR using timing skewMALIPATIL AMARESH·Filed 2011·Granted Feb 11, 2014·30 cites·20 claims
- 0491US8432229B2PVT consistent PLL incorporating multiple LCVCOsDONG YIKUI JEN·Filed 2011·Granted Apr 30, 2013·12 cites·20 claims
- 0590US7961817B2AC coupling circuit integrated with receiver with hybrid stable common-mode voltage generation and baseline wander compensationLSI CORP·Filed 2006·Granted Jun 14, 2011·43 cites·19 claims
- 0675US8324019B2Solution for package crosstalk minimizationTANG GEORGE C·Filed 2009·Granted Dec 4, 2012·9 cites·20 claims
- 0769US9246452B2Extended variable gain amplification bandwidth with high-frequency boostLSI CORP·Filed 2013·Granted Jan 26, 2016·4 cites·20 claims
- 0868US9014252B2Band-pass high-order analog filter backed hybrid receiver equalizationDONG YIKUI JEN·Filed 2006·Granted Apr 21, 2015·4 cites·17 claims
- 0961US9325537B2SerDes PVT detection and closed loop adaptationLSI CORP·Filed 2014·Granted Apr 26, 2016·1 cites·20 claims
- 1053US8442106B2Floating-tap decision feedback equalizer for communication channels with severe reflectionLIU WING FAAT·Filed 2010·Granted May 14, 2013·1 cites·21 claims
- 1147US8102910B2Re-adaption of equalizer parameter to center a sample point in a baud-rate clock and data recovery receiverZHONG FREEMAN Y·Filed 2008·Granted Jan 24, 2012·1 cites·16 claims
- 1246US7825522B2Hybrid bump capacitorLSI CORP·Filed 2007·Granted Nov 2, 2010·0 cites·2 claims
- 1344US8384226B2Hybrid bump capacitorLSI CORP·Filed 2010·Granted Feb 26, 2013·0 cites·17 claims
- 1433US2014159807A1Multiple-clock, noise-immune slicer with offset cancellation and equalization inputsLSI CORP·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →