Inventor · disambiguated record
Peter J. Geiss
Also filed as: GEISS PETER · GEISS PETER J · GEISS PETER JOHN
25 granted patents·1 pending application·514 citations·filing 1993–2008
97Inventor score
Files withIBM26
Top patents by PatentIndex Score
26 records- 0197US5508542APorous silicon trench and capacitor structuresIBM·Filed 1994·Granted Apr 16, 1996·184 cites·33 claims
- 0283US5635419APorous silicon trench and capacitor structuresIBM·Filed 1995·Granted Jun 3, 1997·49 cites·34 claims
- 0380US7696034B2Methods of base formation in a BiCOMS processIBM·Filed 2008·Granted Apr 13, 2010·6 cites·9 claims
- 0479US7777302B2Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structureIBM·Filed 2007·Granted Aug 17, 2010·5 cites·18 claims
- 0579US7390721B2Methods of base formation in a BiCMOS processIBM·Filed 2005·Granted Jun 24, 2008·6 cites·12 claims
- 0676US6965133B2Method of base formation in a BiCMOS processIBM·Filed 2004·Granted Nov 15, 2005·16 cites·9 claims
- 0774US6967167B2Silicon dioxide removing methodIBM·Filed 2003·Granted Nov 22, 2005·16 cites·12 claims
- 0873US6682992B2Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structuresIBM·Filed 2002·Granted Jan 27, 2004·13 cites·31 claims
- 0973US6069049AShrink-wrap collar from DRAM deep trenchesIBM·Filed 1997·Granted May 30, 2000·27 cites·11 claims
- 1072US7625792B2Method of base formation in a BiCMOS processIBM·Filed 2005·Granted Dec 1, 2009·4 cites·14 claims
- 1172US6258695B1Dislocation suppression by carbon incorporationIBM·Filed 1999·Granted Jul 10, 2001·50 cites·7 claims
- 1270US7002190B1Method of collector formation in BiCMOS technologyIBM·Filed 2004·Granted Feb 21, 2006·12 cites·13 claims
- 1370US6936509B2STI pull-down to control SiGe facet growthIBM·Filed 2003·Granted Aug 30, 2005·16 cites·10 claims
- 1468US6660664B1Structure and method for formation of a blocked silicide resistorIBM·Filed 2000·Granted Dec 9, 2003·9 cites·22 claims
- 1567US5356837AMethod of making epitaxial cobalt silicide using a thin metal underlayerIBM·Filed 1993·Granted Oct 18, 1994·39 cites·34 claims
- 1666US6541336B1Method of fabricating a bipolar transistor having a realigned emitterIBM·Filed 2002·Granted Apr 1, 2003·13 cites·23 claims
- 1765US7538004B2Method of fabrication for SiGe heterojunction bipolar transistor (HBT)IBM·Filed 2007·Granted May 26, 2009·2 cites·9 claims
- 1861US6399976B1Shrink-wrap collar for DRAM deep trenchesIBM·Filed 1995·Granted Jun 4, 2002·17 cites·10 claims
- 1959US7491985B2Method of collector formation in BiCMOS technologyIBM·Filed 2005·Granted Feb 17, 2009·1 cites·20 claims
- 2055US6911681B1Method of base formation in a BiCMOS processIBM·Filed 2004·Granted Jun 28, 2005·5 cites·14 claims
- 2152US7247924B2Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structuresIBM·Filed 2003·Granted Jul 24, 2007·3 cites·16 claims
- 2250US6448124B1Method for epitaxial bipolar BiCMOSIBM·Filed 1999·Granted Sep 10, 2002·16 cites·25 claims
- 2344US7317215B2SiGe heterojunction bipolar transistor (HBT)IBM·Filed 2004·Granted Jan 8, 2008·1 cites·7 claims
- 2443US2005095787A1Structure and method for formation of a bipolar resistorIBM·Filed 2004·Application pending·0 cites
- 2539US6674102B2Sti pull-down to control SiGe facet growthIBM·Filed 2001·Granted Jan 6, 2004·1 cites·9 claims
- 2634US6420747B2MOSCAP design for improved reliabilityIBM·Filed 1999·Granted Jul 16, 2002·3 cites·15 claims
Join the waitlist — get patent alerts
Get an alert when Peter J. Geiss files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →