Inventor · disambiguated record
Patrick R. Marchand
Also filed as: MARCHAND PATRICK · MARCHAND PATRICK R · MARCHAND PATRICK RENE
60 granted patents·4 pending applications·835 citations·filing 1985–2022
99Inventor score
Top patents by PatentIndex Score
64 records- 0196US8868838B1Multi-class data cache policiesGLASCO DAVID B·Filed 2008·Granted Oct 21, 2014·67 cites·21 claims
- 0296US7263624B2Methods and apparatus for power control in a scalable array of processor elementsALTERA CORP·Filed 2005·Granted Aug 28, 2007·48 cites·20 claims
- 0395US8244984B1System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policyGLASCO DAVID B·Filed 2008·Granted Aug 14, 2012·53 cites·21 claims
- 0494US7836317B2Methods and apparatus for power control in a scalable array of processor elementsALTERA CORP·Filed 2008·Granted Nov 16, 2010·37 cites·16 claims
- 0593US8108610B1Cache-based control of atomic operations in conjunction with an external ALU blockGLASCO DAVID B·Filed 2008·Granted Jan 31, 2012·31 cites·20 claims
- 0691US8271734B1Method and system for converting data formats using a shared cache coupled between clients and an external memoryGLASCO DAVID B·Filed 2008·Granted Sep 18, 2012·25 cites·20 claims
- 0791US8135926B1Cache-based control of atomic operations in conjunction with an external ALU blockGLASCO DAVID B·Filed 2008·Granted Mar 13, 2012·26 cites·20 claims
- 0890US8234478B1Using a data cache array as a DRAM load/store bufferROBERTS JAMES·Filed 2008·Granted Jul 31, 2012·23 cites·18 claims
- 0989US8131931B1Configurable cache occupancy policyROBERTS JAMES·Filed 2008·Granted Mar 6, 2012·20 cites·24 claims
- 1088US8595437B1Compression status bit cache with deterministic isochronous latencyGLASCO DAVID B·Filed 2008·Granted Nov 26, 2013·18 cites·20 claims
- 1188US8060700B1System, method and frame buffer logic for evicting dirty data from a cache using counters and data typesGLASCO DAVID B·Filed 2008·Granted Nov 15, 2011·18 cites·20 claims
- 1287US8504773B1Storing dynamically sized buffers within a cacheGLASCO DAVID B·Filed 2008·Granted Aug 6, 2013·17 cites·20 claims
- 1387US6216223B1Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processorBILLIONS OF OPERATIONS PER SEC·Filed 1999·Granted Apr 10, 2001·122 cites·29 claims
- 1485US8489858B2Methods and apparatus for scalable array processor interrupt detection and responseBARRY EDWIN FRANKLIN·Filed 2012·Granted Jul 16, 2013·5 cites·20 claims
- 1584US6842811B2Methods and apparatus for scalable array processor interrupt detection and responsePTS CORP·Filed 2001·Granted Jan 11, 2005·24 cites·22 claims
- 1683US7422675B2Process for changing anodes in an electrolytic aluminum production cell including adjustment of the position of the anode and device for implementing the processECL·Filed 2005·Granted Sep 9, 2008·9 cites·21 claims
- 1782US6965991B1Methods and apparatus for power control in a scalable array of processor elementsPTS CORP·Filed 2005·Granted Nov 15, 2005·10 cites·12 claims
- 1882US6775766B2Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processorPTS CORP·Filed 2001·Granted Aug 10, 2004·29 cites·30 claims
- 1981US8949541B2Techniques for evicting dirty data from a cache using a notification sorter and count thresholdsGLASCO DAVID B·Filed 2011·Granted Feb 3, 2015·6 cites·20 claims
- 2081US7809932B1Methods and apparatus for adapting pipeline stage latency based on instruction typeALTERA CORP·Filed 2004·Granted Oct 5, 2010·23 cites·20 claims
- 2180US6735690B1Specifying different type generalized event and action pair in a processorPTS CORP·Filed 2000·Granted May 11, 2004·25 cites·31 claims
- 2279US8862823B1Compression status cachingGLASCO DAVID B·Filed 2008·Granted Oct 14, 2014·9 cites·23 claims
- 2379US8627041B2Efficient line and page organization for compression status bit cachingGLASCO DAVID B·Filed 2010·Granted Jan 7, 2014·5 cites·20 claims
- 2477US8464001B1Cache and associated method with frame buffer managed dirty data pull and high-priority clean mechanismEDMONDSON JOHN H·Filed 2008·Granted Jun 11, 2013·8 cites·13 claims
- 2576US8413086B2Methods and apparatus for adapting pipeline stage latency based on instruction typeBARRY EDWIN FRANKLIN·Filed 2010·Granted Apr 2, 2013·3 cites·20 claims
- 2675US7340591B1Providing parallel operand functions using register file and extra path storageALTERA CORP·Filed 2004·Granted Mar 4, 2008·20 cites·16 claims
- 2774US8874844B1Padding buffer requests to avoid reads of invalid dataGLASCO DAVID B·Filed 2008·Granted Oct 28, 2014·5 cites·24 claims
- 2874US6845445B2Methods and apparatus for power control in a scalable array of processor elementsPTS CORP·Filed 2001·Granted Jan 18, 2005·19 cites·6 claims
- 2973US9329866B2Methods and apparatus for adapting pipeline stage latency based on instruction typeBARRY EDWIN FRANKLIN·Filed 2013·Granted May 3, 2016·2 cites·20 claims
- 3072US6446190B1Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processorBOPS INC·Filed 1999·Granted Sep 3, 2002·59 cites·18 claims
- 3171US10920263B2Methods, compositions and kits for determining cleanness of a surfaceSANI MARC INC·Filed 2016·Granted Feb 16, 2021·2 cites·14 claims
- 3271US9158547B2Methods and apparatus for scalable array processor interrupt detection and responseBARRY EDWIN FRANKLIN·Filed 2014·Granted Oct 13, 2015·1 cites·20 claims
- 3370US8296479B2System core for transferring data between an external device and memoryPECHANEK GERALD GEORGE·Filed 2012·Granted Oct 23, 2012·1 cites·20 claims
- 3470US8156404B1L2 ECC implementationGLASCO DAVID B·Filed 2008·Granted Apr 10, 2012·4 cites·18 claims
- 3570US8117357B2System core for transferring data between an external device and memoryPECHANEK GERALD GEORGE·Filed 2011·Granted Feb 14, 2012·1 cites·20 claims
- 3670US7853779B2Methods and apparatus for scalable array processor interrupt detection and responseALTERA CORP·Filed 2008·Granted Dec 14, 2010·2 cites·23 claims
- 3766US8539130B2Virtual channels for effective packet transferGLASCO DAVID B·Filed 2010·Granted Sep 17, 2013·2 cites·22 claims
- 3866US7565490B1Out of order graphics L2 cacheNVIDIA CORP·Filed 2005·Granted Jul 21, 2009·3 cites·19 claims
- 3966US6748517B1Constructing database representing manifold array architecture instruction set for use in support tool code creationPTS CORP·Filed 2000·Granted Jun 8, 2004·7 cites·18 claims
- 4063US8099650B1L2 ECC implementationGLASCO DAVID B·Filed 2008·Granted Jan 17, 2012·2 cites·20 claims
- 4163US7266620B1System core for transferring data between an external device and memoryALTERA CORP·Filed 2004·Granted Sep 4, 2007·5 cites·18 claims
- 4262US7386710B2Methods and apparatus for scalable array processor interrupt detection and responseALTERA CORP·Filed 2004·Granted Jun 10, 2008·4 cites·9 claims
- 4361US7962667B2System core for transferring data between an external device and memoryPECHANEK GERALD G·Filed 2007·Granted Jun 14, 2011·1 cites·21 claims
- 4460US8700862B2Compression status bit cache and backing storeGLASCO DAVID B·Filed 2008·Granted Apr 15, 2014·1 cites·24 claims
- 4560US7961178B1Method and system for reordering isochronous hub streamsNVIDIA CORP·Filed 2007·Granted Jun 14, 2011·2 cites·20 claims
- 4659US6654870B1Methods and apparatus for establishing port priority functions in a VLIW processorPTS CORP·Filed 2000·Granted Nov 25, 2003·5 cites·46 claims
- 4758US9009365B2System core for transferring data between an external device and memoryALTERA CORP·Filed 2013·Granted Apr 14, 2015·0 cites·20 claims
- 4858US8751772B2Methods and apparatus for scalable array processor interrupt detection and responseBARRY EDWIN FRANKLIN·Filed 2013·Granted Jun 10, 2014·0 cites·19 claims
- 4958US8392667B2Deadlock avoidance by marking CPU traffic as specialDUNCAN SAMUEL H·Filed 2008·Granted Mar 5, 2013·2 cites·17 claims
- 5058USD534481STire treadMICHELIN RECH TECH·Filed 2005·Granted Jan 2, 2007·11 cites·1 claims
Showing the top 50 of 64 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →