Inventor · disambiguated record
Jonathan Ferguson
Also filed as: FERGUSON JONATHAN · FERGUSON JONATHAN L · FERGUSON JONATHAN LOUIS
6 granted patents·2 pending applications·44 citations·filing 2003–2022
80Inventor score
Top patents by PatentIndex Score
8 records- 0179US11567768B2Repeat instruction for loading and/or executing code in a claimable repeat cache a specified number of timesGRAPHCORE LTD·Filed 2019·Granted Jan 31, 2023·2 cites·22 claims
- 0279US7398458B2Method and apparatus for implementing decode operations in a data processorARC INTERNAT PLC·Filed 2006·Granted Jul 8, 2008·11 cites·28 claims
- 0378US11847455B2Clearing register data using a write enable signalGRAPHCORE LTD·Filed 2021·Granted Dec 19, 2023·1 cites·9 claims
- 0477US8201064B2Method and apparatus for implementing decode operations in a data processorFERGUSON JONATHAN·Filed 2008·Granted Jun 12, 2012·11 cites·27 claims
- 0575US7043682B1Method and apparatus for implementing decode operations in a data processorARC INT·Filed 2003·Granted May 9, 2006·19 cites·24 claims
- 0663US2022197645A1Repeat Instruction for Loading and/or Executing Code in a Claimable Repeat Cache a Specified Number of TimesGRAPHCORE LTD·Filed 2022·Application pending·0 cites
- 0742US7272804B2Generation of RTL to carry out parallel arithmetic operationsBROADCOM CORP·Filed 2005·Granted Sep 18, 2007·0 cites·15 claims
- 0837US2003225998A1Configurable data processor with multi-length instruction set architectureFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →