Inventor · disambiguated record
Armin Nückel
Also filed as: NUCKEL ARMIN · NUECKEL ARMIN · NÜCKEL ARMIN
26 granted patents·8 pending applications·576 citations·filing 2000–2018
97Inventor score
Top patents by PatentIndex Score
34 records- 0197US9411532B2Methods and systems for transferring data between a processing device and external devicesPACT XPP TECH AG·Filed 2015·Granted Aug 9, 2016·25 cites·21 claims
- 0295US9690747B2Configurable logic integrated circuit having a multidimensional structure of configurable elementsPACT XPP TECH AG·Filed 2014·Granted Jun 27, 2017·23 cites·1 claims
- 0394US7210129B2Method for translating programs for reconfigurable architecturesPACT XPP TECHNOLOGIES AG·Filed 2001·Granted Apr 24, 2007·107 cites·3 claims
- 0493US7657877B2Method for processing dataPACT XPP TECHNOLOGIES AG·Filed 2002·Granted Feb 2, 2010·95 cites·20 claims
- 0593US7266725B2Method for debugging reconfigurable architecturesPACT XPP TECHNOLOGIES AG·Filed 2001·Granted Sep 4, 2007·59 cites·5 claims
- 0692US8869121B2Method for the translation of programs for reconfigurable architecturesVORBACH MARTIN·Filed 2011·Granted Oct 21, 2014·17 cites·13 claims
- 0792US7595659B2Logic cell array and bus systemPACT XPP TECHNOLOGIES AG·Filed 2001·Granted Sep 29, 2009·59 cites·129 claims
- 0889US8058899B2Logic cell array and bus systemVORBACH MARTIN·Filed 2009·Granted Nov 15, 2011·17 cites·82 claims
- 0988US9047440B2Logical cell array and bus systemPACT XPP TECHNOLOGIES AG·Filed 2013·Granted Jun 2, 2015·9 cites·11 claims
- 1087US8281265B2Method and device for processing dataVORBACH MARTIN·Filed 2009·Granted Oct 2, 2012·14 cites·21 claims
- 1187US7003660B2Pipeline configuration unit protocols and communicationPACT XPP TECHNOLOGIES AG·Filed 2001·Granted Feb 21, 2006·40 cites·20 claims
- 1284US8726250B2Configurable logic integrated circuit having a multidimensional structure of configurable elementsVORBACH MARTIN·Filed 2010·Granted May 13, 2014·5 cites·23 claims
- 1384US7996827B2Method for the translation of programs for reconfigurable architecturesVORBACH MARTIN·Filed 2002·Granted Aug 9, 2011·46 cites·80 claims
- 1483US8301872B2Pipeline configuration protocol and configuration unit communicationVORBACH MARTIN·Filed 2005·Granted Oct 30, 2012·11 cites·17 claims
- 1579US10152320B2Method of transferring data between external devices and an array processorSCIENTIA SOL MENTIS AG·Filed 2016·Granted Dec 11, 2018·2 cites·7 claims
- 1679US8471593B2Logic cell array and bus systemVORBACH MARTIN·Filed 2011·Granted Jun 25, 2013·4 cites·30 claims
- 1778US9250908B2Multi-processor bus and cache interconnection systemPACT XPP TECHNOLOGIES AG·Filed 2014·Granted Feb 2, 2016·4 cites·10 claims
- 1878US8230411B1Method for interleaving a program over a plurality of cellsVORBACH MARTIN·Filed 2000·Granted Jul 24, 2012·16 cites·23 claims
- 1977US7657861B2Method and device for processing dataPACT XPP TECHNOLOGIES AG·Filed 2003·Granted Feb 2, 2010·20 cites·13 claims
- 2069US7840842B2Method for debugging reconfigurable architecturesVORBACH MARTIN·Filed 2007·Granted Nov 23, 2010·2 cites·13 claims
- 2165US8468329B2Pipeline configuration protocol and configuration unit communicationVORBACH MARTIN·Filed 2012·Granted Jun 18, 2013·1 cites·28 claims
- 2260US10409765B2Method for providing subapplications to an array of ALUsSCIENTIA SOL MENTIS AG·Filed 2017·Granted Sep 10, 2019·0 cites·9 claims
- 2359US2019102173A1Methods and systems for transferring data between a processing device and external devicesSCIENTIA SOL MENTIS AG·Filed 2018·Application pending·0 cites
- 2455US9256575B2Data processor chip with flexible bus systemPACT XPP TECHNOLOGIES AG·Filed 2015·Granted Feb 9, 2016·0 cites·11 claims
- 2555US2015033000A1Parallel Processing Array of Arithmetic Unit having a Barrier InstructionPACT XPP TECHNOLOGIES AG·Filed 2014·Application pending·0 cites
- 2654US9141390B2Method of processing data with an array of data processors according to application IDPACT XPP TECHNOLOGIES AG·Filed 2014·Granted Sep 22, 2015·0 cites·10 claims
- 2754US2010095094A1Method for processing dataVORBACH MARTIN·Filed 2009·Application pending·0 cites
- 2853US8312200B2Processor chip including a plurality of cache elements connected to a plurality of processor coresVORBACH MARTIN·Filed 2010·Granted Nov 13, 2012·0 cites·42 claims
- 2952US2014325175A1Pipeline configuration protocol and configuration unit communicationPACT XPP TECHNOLOGIES AG·Filed 2013·Application pending·0 cites
- 3049US2009210653A1Method and device for treating and processing dataPACT XPP TECHNOLOGIES AG·Filed 2009·Application pending·0 cites
- 3146US9626325B2Array processor having a segmented bus systemPACT XPP TECH AG·Filed 2016·Granted Apr 18, 2017·0 cites·3 claims
- 3242US2007299993A1Method and Device for Treating and Processing DataPACT XPP TECHNOLOGIES AG·Filed 2002·Application pending·0 cites
- 3340US2004015899A1Method for processing dataFiled 2001·Application pending·0 cites
- 3439US2019065428A9Array Processor Having a Segmented Bus SystemSCIENTIA SOL MENTIS AG·Filed 2017·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →