Inventor · disambiguated record
Pradeep Ramachandramurthy Yelehanka
Also filed as: PRADEEP YELEHANKA R · PRADEEP YELEHANKA RAMAGHANDRAMURTHY · YELEHANKA PRADEEP · YELEHANKA PRADEEP R
30 granted patents·3 pending applications·435 citations·filing 2002–2018
96Inventor score
Files withCHARTERED SEMICONDUCTOR MFG15GLOBALFOUNDRIES SG PTE LTD9YELEHANKA PRADEEP RAMACHANDRAMURTHY3KOTLANKA RAMA KRISHNA2CHAN TZE HO SIMON1
Top patents by PatentIndex Score
33 records- 0194US6884712B2Method of manufacturing semiconductor local interconnect and contactCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Apr 26, 2005·233 cites·10 claims
- 0292US7960282B2Method of manufacture an integrated circuit system with through silicon viaGLOBALFOUNDRIES SG PTE LTD·Filed 2009·Granted Jun 14, 2011·29 cites·20 claims
- 0390US7081378B2Horizontal TRAM and method for the fabrication thereofCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Jul 25, 2006·45 cites·15 claims
- 0489US8236688B2Integrated circuit system with through silicon via and method of manufacture thereofYELEHANKA PRADEEP RAMACHANDRAMURTHY·Filed 2011·Granted Aug 7, 2012·12 cites·27 claims
- 0586US7879732B2Thin film etching method and semiconductor device fabrication using sameCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Feb 1, 2011·8 cites·24 claims
- 0685US7759207B2Integrated circuit system employing stress memorization transferCHARTERED SEMICONDUCTOR MFG·Filed 2007·Granted Jul 20, 2010·8 cites·10 claims
- 0784US10793421B2Wafer level encapsulation for MEMS deviceVANGUARD INT SEMICONDUCTOR SINGAPORE PTE LTD·Filed 2017·Granted Oct 6, 2020·6 cites·12 claims
- 0881US8513767B2Package interconnectsKOTLANKA RAMA KRISHNA·Filed 2011·Granted Aug 20, 2013·9 cites·20 claims
- 0981US7964894B2Integrated circuit system employing stress memorization transferGLOBALFOUNDRIES SG PTE LTD·Filed 2010·Granted Jun 21, 2011·4 cites·10 claims
- 1081US7015101B2Multi-level gate SONOS flash memory device with high voltage oxide and method for the fabrication thereofCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Mar 21, 2006·22 cites·9 claims
- 1178US7285804B2Thyristor-based SRAMCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Oct 23, 2007·6 cites·10 claims
- 1276US7323736B2Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Jan 29, 2008·4 cites·44 claims
- 1376US7183590B2Horizontal tramCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Feb 27, 2007·5 cites·10 claims
- 1475US9272899B2Bonding method using porosified surfaces for making stacked structuresGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Granted Mar 1, 2016·3 cites·18 claims
- 1575US7501683B2Integrated circuit with protected implantation profiles and method for the formation thereofCHARTERED SEMICONDUCTOR MFG·Filed 2006·Granted Mar 10, 2009·4 cites·10 claims
- 1670US9620373B1Methods for fabricating semiconductor or micromachined devices with metal structures and methods for forming self-aligned deep cavity metal structuresGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Granted Apr 11, 2017·2 cites·20 claims
- 1770US8304834B2Semiconductor local interconnect and contactYELEHANKA PRADEEP RAMACHANDRAMURTHY·Filed 2006·Granted Nov 6, 2012·6 cites·5 claims
- 1868US8536705B2Integrated circuit system with through silicon via and method of manufacture thereofYELEHANKA PRADEEP RAMACHANDRAMURTHY·Filed 2012·Granted Sep 17, 2013·2 cites·8 claims
- 1967US7148522B2Thyristor-based SRAMCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted Dec 12, 2006·11 cites·5 claims
- 2062US10301171B1Wafer level packaging for MEMS deviceGLOBALFOUNDRIES SG PTE LTD·Filed 2017·Granted May 28, 2019·1 cites·19 claims
- 2160US7119005B2Semiconductor local interconnect and contactCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Oct 10, 2006·2 cites·5 claims
- 2255US7067362B2Integrated circuit with protected implantation profiles and method for the formation thereofCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Jun 27, 2006·4 cites·4 claims
- 2355US6897111B2Method using quasi-planar double gated fin field effect transistor process for the fabrication of a thyristor-based static read/write random-access memoryCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted May 24, 2005·5 cites·10 claims
- 2454US9932224B2Semiconductor devices with cavities and methods for fabricating semiconductor devices with cavitiesGLOBALFOUNDRIES SG PTE LTD·Filed 2015·Granted Apr 3, 2018·0 cites·20 claims
- 2554US2018170748A1Semiconductor devices with cavities and methods for fabricating semiconductor devices with cavitiesGLOBALFOUNDRIES SG PTE LTD·Filed 2018·Application pending·0 cites
- 2653US7060193B2Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuitsCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jun 13, 2006·3 cites·60 claims
- 2745US2013034954A1Integrated circuit system including nitride layer technologyGLOBALFOUNDRIES SG PTE LTD·Filed 2012·Application pending·0 cites
- 2844US8940616B2Bonding method using porosified surfaces for making stacked structuresKOTLANKA RAMA KRISHNA·Filed 2012·Granted Jan 27, 2015·0 cites·26 claims
- 2943US6849481B1Thyristor-based SRAM and method for the fabrication thereofCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Feb 1, 2005·1 cites·10 claims
- 3041US2015048509A1Cmos compatible wafer bonding layer and processGLOBALFOUNDRIES SG PTE LTD·Filed 2014·Application pending·0 cites
- 3140US8283263B2Integrated circuit system including nitride layer technologyNAGARAD SRIPAD SHESHAGIRI·Filed 2006·Granted Oct 9, 2012·0 cites·10 claims
- 3235US8394724B2Processing with reduced line end shortening ratioCONG HAI·Filed 2007·Granted Mar 12, 2013·0 cites·17 claims
- 3331US8236646B2Non-volatile memory manufacturing method using STI trench implantationCHAN TZE HO SIMON·Filed 2003·Granted Aug 7, 2012·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →