Inventor · disambiguated record
Alexander Korobkov
Also filed as: KOROBKOV ALEXANDER · KOROBKOV ALEXANDER I
16 granted patents·3 pending applications·117 citations·filing 2001–2015
92Inventor score
Technology areasG06F
Top patents by PatentIndex Score
19 records- 0183US7484195B1Method to improve time domain sensitivity analysis performanceSUN MICROSYSTEMS INC·Filed 2006·Granted Jan 27, 2009·13 cites·18 claims
- 0282US7421671B2Graph pruning scheme for sensitivity analysis with partitionsSUN MICROSYSTEMS INC·Filed 2006·Granted Sep 2, 2008·13 cites·19 claims
- 0377US7107200B1Method and apparatus for predicting clock skew for incomplete integrated circuit designSUN MICROSYSTEMS INC·Filed 2003·Granted Sep 12, 2006·26 cites·66 claims
- 0473US9836562B2Iteratively simulating electrostatic discharges for a reduced netlistORACLE INT CORP·Filed 2015·Granted Dec 5, 2017·2 cites·17 claims
- 0573US7865348B1Performance of circuit simulation with multiple combinations of input stimuliORACLE AMERICA INC·Filed 2007·Granted Jan 4, 2011·7 cites·6 claims
- 0672US8341577B1Parallel circuit simulation with partitionsKOROBKOV ALEXANDER·Filed 2011·Granted Dec 25, 2012·4 cites·10 claims
- 0772US6763509B2Method and apparatus for allocating decoupling capacitor cellsSUN MICROSYSTEMS INC·Filed 2002·Granted Jul 13, 2004·18 cites·43 claims
- 0869US9275175B2Integrated circuit clock tree visualizerORACLE INT CORP·Filed 2014·Granted Mar 1, 2016·2 cites·21 claims
- 0969US8464195B1Integrated circuit clock analysis with macro modelsKOROBKOV ALEXANDER·Filed 2012·Granted Jun 11, 2013·4 cites·20 claims
- 1067US8024051B2Parallel power grid analysisORACLE AMERICA INC·Filed 2009·Granted Sep 20, 2011·4 cites·14 claims
- 1167US7953581B2System, method and apparatus for sensitivity based fast power grid simulation with variable time stepORACLE AMERICA INC·Filed 2008·Granted May 31, 2011·4 cites·11 claims
- 1265US6895524B2Circuit reduction technique for improving clock net analysis performanceSUN MICROSYSTEMS INC·Filed 2001·Granted May 17, 2005·11 cites·12 claims
- 1364US8645883B2Integrated circuit simulation using fundamental and derivative circuit runsKOROBKOV ALEXANDER·Filed 2012·Granted Feb 4, 2014·2 cites·19 claims
- 1459US6912705B2Method and apparatus for performing operation on physical design dataSUN MICROSYSTEMS INC·Filed 2002·Granted Jun 28, 2005·7 cites·33 claims
- 1548US7949970B1Fast reduction of system modelsORACLE AMERICA INC·Filed 2007·Granted May 24, 2011·0 cites·11 claims
- 1646US8190407B2Method and system for evaluating a device during circuit simulationKOROBKOV ALEXANDER·Filed 2009·Granted May 29, 2012·0 cites·14 claims
- 1745US2015339419A1Efficient power grid analysis on multiple cpu cores with states eliminationORACLE INT CORP·Filed 2014·Application pending·0 cites
- 1841US2004059558A1Hierarchical reduced-order circuit model for clock net verificationFiled 2002·Application pending·0 cites
- 1941US2003144825A1Prediction method and apparatus for delay and skew analysisFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →