Inventor · disambiguated record
Chin Chang Liao
Also filed as: LIAO CHIN-CHANG
9 granted patents·1 pending application·13 citations·filing 2006–2021
80Inventor score
Files withSINGULAR WINGS MEDICAL CO LTD3SU TING CHIEH3LIAO CHIN-CHANG1PING WANG JIAN1SEMICONDUCTOR MFG INT SHANGHAI1
Top patents by PatentIndex Score
10 records- 0171US7642602B2System and method for I/O ESD protection with polysilicon regions fabricated by processes for making core transistorsSEMICONDUCTOR MFG INT SHANGHAI·Filed 2006·Granted Jan 5, 2010·5 cites·8 claims
- 0270US10980464B2System and method for measuring physiological signalSINGULAR WINGS MEDICAL CO LTD·Filed 2017·Granted Apr 20, 2021·2 cites·16 claims
- 0366US8686507B2System and method for I/O ESD protection with floating and/or biased polysilicon regionsSU TING CHIEH·Filed 2006·Granted Apr 1, 2014·5 cites·12 claims
- 0449US8415663B2System and method for test structure on a waferPING WANG JIAN·Filed 2009·Granted Apr 9, 2013·1 cites·18 claims
- 0547US2013164588A1Electronic deviceLIAO CHIN-CHANG·Filed 2012·Application pending·0 cites
- 0646US8283726B2System and method for I/O ESD protection with polysilicon regions fabricated by processes for making core transistorsSU TING CHIEH·Filed 2009·Granted Oct 9, 2012·0 cites·10 claims
- 0745US10524678B2Physiological signal receiving apparatus and manufacturing method thereofSINGULAR WINGS MEDICAL CO LTD·Filed 2017·Granted Jan 7, 2020·0 cites·8 claims
- 0844US11690171B2Conductive bump electrode structureSINGULAR WINGS MEDICAL CO LTD·Filed 2021·Granted Jun 27, 2023·0 cites·14 claims
- 0943US9472476B2System and method for test structure on a waferSEMICONDUCTOR MFG INT SHANGHAI CORP·Filed 2013·Granted Oct 18, 2016·0 cites·15 claims
- 1033US8319286B2System and method for input pin ESD protection with floating and/or biased polysilicon regionsSU TING CHIEH·Filed 2010·Granted Nov 27, 2012·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →