Inventor · disambiguated record
Srivaths Ravi
Also filed as: RAVI SRIVATHS
13 granted patents·5 pending applications·227 citations·filing 2002–2019
92Inventor score
Top patents by PatentIndex Score
18 records- 0192US8671329B2Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processesTEXAS INSTRUMENTS INC·Filed 2013·Granted Mar 11, 2014·17 cites·15 claims
- 0292US8438344B2Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processesKUMAR SANJAY·Filed 2010·Granted May 7, 2013·19 cites·19 claims
- 0390US8205125B2Enhanced control in scan tests of integrated circuits with partitioned scan chainsHALES ALAN DAVID·Filed 2009·Granted Jun 19, 2012·40 cites·4 claims
- 0489US8286042B2On-chip seed generation using boolean functions for LFSR re-seeding based logic BIST techniques for low cost field testabilityGANGASANI SWATHI·Filed 2010·Granted Oct 9, 2012·17 cites·13 claims
- 0589US7134100B2Method and apparatus for efficient register-transfer level (RTL) power estimationNEC USA INC·Filed 2002·Granted Nov 7, 2006·59 cites·27 claims
- 0685US11333707B2Testing of integrated circuits during at-speed mode of operationTEXAS INSTRUMENTS INC·Filed 2019·Granted May 17, 2022·3 cites·18 claims
- 0782US7278123B2System-level test architecture for delivery of compressed testsNEC LAB AMERICA INC·Filed 2004·Granted Oct 2, 2007·40 cites·42 claims
- 0881US7529669B2Voice-based multimodal speaker authentication using adaptive training and applications thereofNEC LAB AMERICA INC·Filed 2007·Granted May 5, 2009·13 cites·8 claims
- 0969US7260809B2Power estimation employing cycle-accurate functional descriptionsNEC LAB AMERICA INC·Filed 2006·Granted Aug 21, 2007·4 cites·17 claims
- 1068US8856601B2Scan compression architecture with bypassable scan chains for low test mode powerRAVI SRIVATHS·Filed 2010·Granted Oct 7, 2014·3 cites·7 claims
- 1168US8839063B2Circuits and methods for dynamic allocation of scan test resourcesTEXAS INSTRUMENTS INC·Filed 2013·Granted Sep 16, 2014·2 cites·20 claims
- 1263US7173906B2Flexible crossbar switching fabricNEC CORP·Filed 2002·Granted Feb 6, 2007·10 cites·16 claims
- 1350US2015212152A1Testing of integrated circuits during at-speed mode of operationTEXAS INSTRUMENTS INC·Filed 2015·Application pending·0 cites
- 1445US2005204155A1Tamper resistant secure architectureNEC LAB AMERICA INC·Filed 2004·Application pending·0 cites
- 1543US2007101424A1Apparatus and Method for Improving Security of a Bus Based System Through Communication Architecture EnhancementsNEC LAB AMERICA INC·Filed 2006·Application pending·0 cites
- 1643US2003142818A1Techniques for efficient security processingNEC USA INC·Filed 2002·Application pending·0 cites
- 1740US2006058994A1Power estimation through power emulationNEC LAB AMERICA INC·Filed 2005·Application pending·0 cites
- 1828US8527821B2Hybrid test compression architecture using multiple codecs for low pin count and high compression devicesSHAH MALAV SHRIKANT·Filed 2010·Granted Sep 3, 2013·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →