Inventor · disambiguated record
Yen-Pin Chen
Also filed as: CHEN YEN-PIN
19 granted patents·6 pending applications·152 citations·filing 2010–2024
92Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD20TAIWAN SEMICONDUCTOR MFG2CHEN YEN PIN1FU CHUNG-MIN1REALTEK SEMICONDUCTOR CORP1
Top patents by PatentIndex Score
25 records- 0197US11068637B1Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jul 20, 2021·9 cites·20 claims
- 0297US8826212B2Method of forming a layout including cells having different threshold voltages, a system of implementing and a layout formedTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 2, 2014·112 cites·20 claims
- 0390US10157840B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 18, 2018·5 cites·20 claims
- 0488US9477803B2Method of generating techfile having reduced corner variation valueTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 25, 2016·9 cites·20 claims
- 0586US2024387373A1Integrated Circuit Having a High Cell DensityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0683US8914755B1Layout re-decomposition for multiple patterning layoutsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Dec 16, 2014·7 cites·20 claims
- 0782US2025086371A1Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0880US12175180B2Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 24, 2024·0 cites·20 claims
- 0979US12087690B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 10, 2024·0 cites·20 claims
- 1078US10678989B2Method and system for sigma-based timing optimizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jun 9, 2020·2 cites·20 claims
- 1178US8677292B2Cell-context aware integrated circuit designFU CHUNG-MIN·Filed 2010·Granted Mar 18, 2014·6 cites·26 claims
- 1277US2024370629A1Method of generating netlist including proximity-effect-inducer (pei) parametersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1372US11437319B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Sep 6, 2022·0 cites·20 claims
- 1472US2023385512A1Method of generating netlist including proximity-effect-inducer (pei) parametersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 1571US11816413B2Systems and methods for context aware circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Nov 14, 2023·0 cites·20 claims
- 1671US9563734B2Characterizing cell using input waveform generation considering different circuit topologiesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Feb 7, 2017·2 cites·20 claims
- 1767US12086522B2Method of generating netlist including proximity-effect-inducer (PEI) parametersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Sep 10, 2024·0 cites·20 claims
- 1862US11176305B2Method and system for sigma-based timing optimizationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 16, 2021·0 cites·20 claims
- 1961US10804200B2Integrated circuit having a high cell densityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Oct 13, 2020·0 cites·20 claims
- 2057US2022130550A1Method of obtaining advice data of physiological characteristics for a patient in order to lower risk of the patient entering a medical emergency stateCHEN YEN PIN·Filed 2021·Application pending·0 cites
- 2153US10467364B2Characterizing cell using input waveforms with different tail characteristicsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Nov 5, 2019·0 cites·20 claims
- 2253US10169506B2Circuit design method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 1, 2019·0 cites·20 claims
- 2345US10176284B2Semiconductor circuit design and manufacture methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 8, 2019·0 cites·20 claims
- 2442US10515166B2Method of timing analysisTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 24, 2019·0 cites·20 claims
- 2542US2022206704A1Embedded memory system and memory testing methodREALTEK SEMICONDUCTOR CORP·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →