Inventor · disambiguated record
Darin Starkey
Also filed as: STARKEY DARIN · STARKEY DARIN M
14 granted patents·3 pending applications·94 citations·filing 2014–2024
91Inventor score
Files withINTEL CORP17
Top patents by PatentIndex Score
17 records- 0198US12007935B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2020·Granted Jun 11, 2024·11 cites·25 claims
- 0298US11709793B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2022·Granted Jul 25, 2023·9 cites·16 claims
- 0398US11361496B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2021·Granted Jun 14, 2022·41 cites·23 claims
- 0497US11954063B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2023·Granted Apr 9, 2024·2 cites·23 claims
- 0596US11204977B2Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputsINTEL CORP·Filed 2020·Granted Dec 21, 2021·7 cites·20 claims
- 0694US11636174B2Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputsINTEL CORP·Filed 2021·Granted Apr 25, 2023·3 cites·20 claims
- 0793US10360654B1Software scoreboard information and synchronizationINTEL CORP·Filed 2018·Granted Jul 23, 2019·16 cites·20 claims
- 0890US2024362180A1Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2024·Application pending·0 cites
- 0979US2024427847A1Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputsINTEL CORP·Filed 2024·Application pending·0 cites
- 1077US12039001B2Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputsINTEL CORP·Filed 2023·Granted Jul 16, 2024·0 cites·20 claims
- 1175US9983884B2Method and apparatus for SIMD structured branchingINTEL CORP·Filed 2014·Granted May 29, 2018·3 cites·23 claims
- 1273US10699362B2Divergent control flow for fused EUsINTEL CORP·Filed 2016·Granted Jun 30, 2020·2 cites·22 claims
- 1371US11900502B2Compiler assisted register file write reductionINTEL CORP·Filed 2022·Granted Feb 13, 2024·0 cites·20 claims
- 1462US11321799B2Compiler assisted register file write reductionINTEL CORP·Filed 2019·Granted May 3, 2022·0 cites·26 claims
- 1559US10692170B2Software scoreboard information and synchronizationINTEL CORP·Filed 2019·Granted Jun 23, 2020·0 cites·20 claims
- 1652US9928076B2Method and apparatus for unstructured control flow for SIMD execution engineINTEL CORP·Filed 2014·Granted Mar 27, 2018·0 cites·22 claims
- 1740US2019265973A1Fusion of SIMD Processing UnitsINTEL CORP·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →