Inventor · disambiguated record
Thierry Pons
Also filed as: PONS THIERRY
9 granted patents·1 pending application·33 citations·filing 2005–2019
83Inventor score
Technology areasG06F
Top patents by PatentIndex Score
10 records- 0184US9542154B2Fused multiply add operations using bit masksRUBANOVICH SIMON·Filed 2013·Granted Jan 10, 2017·12 cites·18 claims
- 0280US8103858B2Efficient parallel floating point exception handling in a processorSPERBER ZEEV·Filed 2008·Granted Jan 24, 2012·14 cites·15 claims
- 0377US10521226B2Efficient implementation of complex vector fused multiply add and complex vector multiplyINTEL CORP·Filed 2018·Granted Dec 31, 2019·2 cites·23 claims
- 0467US8918446B2Reducing power consumption in multi-precision floating point multipliersBOSWELL BRENT R·Filed 2010·Granted Dec 23, 2014·4 cites·18 claims
- 0562US11455167B2Efficient implementation of complex vector fused multiply add and complex vector multiplyINTEL CORP·Filed 2019·Granted Sep 27, 2022·0 cites·13 claims
- 0654US7536485B2Processor having inactive state of operation and method thereofINTEL CORP·Filed 2005·Granted May 19, 2009·1 cites·25 claims
- 0749US9274752B2Leading change anticipator logicINTEL CORP·Filed 2012·Granted Mar 1, 2016·0 cites·23 claims
- 0847US10157059B2Instruction and logic for early underflow detection and rounder bypassINTEL CORP·Filed 2016·Granted Dec 18, 2018·0 cites·17 claims
- 0946US9092226B2Efficient parallel floating point exception handling in a processorSPERBER ZEEV·Filed 2011·Granted Jul 28, 2015·0 cites·11 claims
- 1041US2007005940A1System, apparatus and method of executing a micro operationSPERBER ZEEV·Filed 2005·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Thierry Pons files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →