Inventor · disambiguated record
Laurentiu Birsan
Also filed as: BIRSAN LAURENTIU
12 granted patents·2 pending applications·52 citations·filing 2005–2020
88Inventor score
Top patents by PatentIndex Score
14 records- 0194US11003606B2DMA-scatter and gather operations for non-contiguous memoryMICROCHIP TECH INC·Filed 2020·Granted May 11, 2021·7 cites·20 claims
- 0289US8880756B1Direct memory access controllerATMEL CORP·Filed 2013·Granted Nov 4, 2014·16 cites·20 claims
- 0380US8415975B1Programmable logic unitBIRSAN LAURENTIU·Filed 2011·Granted Apr 9, 2013·5 cites·27 claims
- 0479US7411913B2Process for automatically detecting the throughput of a network, particularly of the can bus type and for configuring with the detected throughput by transition analysis, and corresponding deviceATMEL NANTES SA·Filed 2005·Granted Aug 12, 2008·14 cites·14 claims
- 0569US9442873B2Direct memory access controllerATMEL CORP·Filed 2014·Granted Sep 13, 2016·2 cites·24 claims
- 0666US7389373B2Asynchronous arbitration device and microcontroller comprising such an arbitration deviceATMEL NANTES SA·Filed 2006·Granted Jun 17, 2008·4 cites·15 claims
- 0764US9083339B2Programmable logic unitATMEL CORP·Filed 2013·Granted Jul 14, 2015·1 cites·20 claims
- 0862US10049071B2Programmable logic unitATMEL CORP·Filed 2015·Granted Aug 14, 2018·1 cites·18 claims
- 0959US8943238B2Operations using direct memory accessBIRSAN LAURENTIU·Filed 2012·Granted Jan 27, 2015·2 cites·21 claims
- 1047US9690727B2System internal latency measurements in realtime applicationsAMTEL CORP·Filed 2014·Granted Jun 27, 2017·0 cites·19 claims
- 1141US9690726B2Peripheral register parameter refreshingATMEL CORP·Filed 2014·Granted Jun 27, 2017·0 cites·19 claims
- 1241US2007255911A1Method of optimising writing by a master block into a fifo type interfacing device between this master block and a slave block, and the corresponding computer program productATMEL NANTES SA·Filed 2007·Application pending·0 cites
- 1340US2007033306A1FIFO-type one-way interfacing device between a master unit and a slave unit, and corresponding master unit and slave unitATMEL NANTES SA·Filed 2006·Application pending·0 cites
- 1436US9354611B2Event driven signal convertersATMEL CORP·Filed 2014·Granted May 31, 2016·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →