Inventor · disambiguated record
Hung-Hsiang Cheng
Also filed as: CHENG HUNG-HSIANG
14 granted patents·8 pending applications·28 citations·filing 2007–2023
88Inventor score
Files withADVANCED SEMICONDUCTOR ENG9CHENG HUNG-HSIANG5TAIWAN SEMICONDUCTOR MFG CO LTD5HUANG CHIH-YI2BRICKCOM CORP1
Top patents by PatentIndex Score
22 records- 0192US11502174B2Method for reducing Schottky barrier height and semiconductor device with reduced Schottky barrier heightTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 15, 2022·2 cites·20 claims
- 0292US11031239B2Germanium nanosheets and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 8, 2021·7 cites·20 claims
- 0386US10797137B2Method for reducing Schottky barrier height and semiconductor device with reduced Schottky barrier heightTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Oct 6, 2020·3 cites·20 claims
- 0485US11316249B2Semiconductor device packageADVANCED SEMICONDUCTOR ENG·Filed 2020·Granted Apr 26, 2022·2 cites·18 claims
- 0582US8541883B2Semiconductor device having shielded conductive viasCHENG HUNG-HSIANG·Filed 2011·Granted Sep 24, 2013·8 cites·14 claims
- 0677US11817481B2Method for reducing Schottky barrier height and semiconductor device with reduced Schottky barrier heightTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Nov 14, 2023·0 cites·20 claims
- 0766US7851709B2Multi-layer circuit board having ground shielding wallsADVANCED SEMICONDUCTOR ENG·Filed 2007·Granted Dec 14, 2010·3 cites·13 claims
- 0862US8193454B2Circuit substrate having power/ground plane with grid holesCHENG HUNG-HSIANG·Filed 2009·Granted Jun 5, 2012·3 cites·10 claims
- 0959US11239074B2Germanium nanosheets and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Feb 1, 2022·0 cites·20 claims
- 1055US2025219283A1Electronic deviceADVANCED SEMICONDUCTOR ENG·Filed 2023·Application pending·0 cites
- 1154US11228088B2Semiconductor device packageADVANCED SEMICONDUCTOR ENG·Filed 2020·Granted Jan 18, 2022·0 cites·22 claims
- 1252US7977784B2Semiconductor package having redistribution layerADVANCED SEMICONDUCTOR ENG·Filed 2008·Granted Jul 12, 2011·0 cites·5 claims
- 1351US11670836B2Semiconductor device packageADVANCED SEMICONDUCTOR ENG·Filed 2020·Granted Jun 6, 2023·0 cites·15 claims
- 1444US7755549B2Carrier with solid antenna structure and manufacturing method thereofADVANCED SEMICONDUCTOR ENG·Filed 2007·Granted Jul 13, 2010·0 cites·19 claims
- 1544US2010065312A1Substrate for window ball grid array packageCHENG HUNG-HSIANG·Filed 2009·Application pending·0 cites
- 1644US2009019692A1Method of cutting signal wire preserved on circuit board and circuit layout thereofADVANCED SEMICONDUCTOR ENG·Filed 2008·Application pending·0 cites
- 1743US2010071939A1Substrate of window ball grid array packageCHENG HUNG-HSIANG·Filed 2009·Application pending·0 cites
- 1842US2008093702A1Semiconductor device having a passive deviceADVANCED SEMICONDUCTOR ENG·Filed 2007·Application pending·0 cites
- 1941US8389394B2Method of making semiconductor package having redistribution layerHUANG CHIH-YI·Filed 2011·Granted Mar 5, 2013·0 cites·20 claims
- 2041US2016044249A1Network camera that connects a plurality of extensible imagersBRICKCOM CORP·Filed 2014·Application pending·0 cites
- 2140US2010102447A1Substrate of window ball grid array package and method for making the sameHUANG CHIH-YI·Filed 2009·Application pending·0 cites
- 2233US2010283139A1Semiconductor Device Package Having Chip With Conductive LayerCHENG HUNG-HSIANG·Filed 2010·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Hung-Hsiang Cheng files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →