Inventor · disambiguated record
Alfonso Maurelli
Also filed as: MAURELLI ALFONSO
29 granted patents·2 pending applications·341 citations·filing 1990–2008
97Inventor score
Files withST MICROELECTRONICS SRL27SGS THOMSON MICROELECTRONICS2PIAZZA FAUSTO1ST MICROELECTONICS SRL1
Top patents by PatentIndex Score
31 records- 0186US6482698B2Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chipST MICROELECTRONICS SRL·Filed 2001·Granted Nov 19, 2002·34 cites·19 claims
- 0282US6410387B1Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitryST MICROELECTRONICS SRL·Filed 1999·Granted Jun 25, 2002·38 cites·24 claims
- 0380US6713347B2Process for integrating in a same chip a non-volatile memory and a high-performance logic circuitryST MICROELECTRONICS SRL·Filed 2002·Granted Mar 30, 2004·18 cites·16 claims
- 0479US6627928B2Method of manufacturing an integrated circuit, for integrating an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chipST MICROELECTRONICS SRL·Filed 2002·Granted Sep 30, 2003·20 cites·11 claims
- 0573US6876033B2Electrically erasable and programmable non-volatile memory cellST MICROELECTRONICS SRL·Filed 2003·Granted Apr 5, 2005·19 cites·19 claims
- 0671US6410389B1Non-volatile memory cell with a single level of polysilicon, in particular of the flash EEPROM type, and method for manufacturing the sameST MICROELECTRONICS SRL·Filed 2000·Granted Jun 25, 2002·17 cites·21 claims
- 0768US7410872B2Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structureST MICROELECTRONICS SRL·Filed 2006·Granted Aug 12, 2008·3 cites·41 claims
- 0868US5307312AProcess for obtaining an N-channel single polysilicon level EPROM cell and cell obtained with said processST MICROELECTRONICS SRL·Filed 1991·Granted Apr 26, 1994·24 cites·17 claims
- 0966US6576950B1EEPROM type non-volatile memory cell and corresponding production methodST MICROELECTRONICS SRL·Filed 2000·Granted Jun 10, 2003·13 cites·12 claims
- 1066US6181602B1Device and method for reading nonvolatile memory cellsST MICROELECTRONICS SRL·Filed 1999·Granted Jan 30, 2001·23 cites·25 claims
- 1163US6350637B1Method of fabrication of a no-field MOS transistorST MICROELECTRONICS SRL·Filed 2000·Granted Feb 26, 2002·12 cites·11 claims
- 1260US7001800B2Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuitST MICROELECTRONICS SRL·Filed 2004·Granted Feb 21, 2006·8 cites·7 claims
- 1359US6451653B2Manufacturing process for the integration in a semiconductor chip of an integrated circuit including a high-density integrated circuit components portion and a high-performance logic integrated circuit components portionST MICROELECTRONICS SRL·Filed 2001·Granted Sep 17, 2002·7 cites·19 claims
- 1459US6275960B1Self-test and correction of loss of charge errors in a flash memory, erasable and programmable by sectors thereofST MICROELECTRONICS SRL·Filed 1998·Granted Aug 14, 2001·19 cites·27 claims
- 1559US5936276ASingle polysilicon level flash EEPROM cell and manufacturing process thereforST MICROELECTRONICS SRL·Filed 1997·Granted Aug 10, 1999·16 cites·11 claims
- 1659US5479367AN-channel single polysilicon level EPROM cellST MICROELECTRONICS SRL·Filed 1994·Granted Dec 26, 1995·16 cites·6 claims
- 1754US6188121B1High voltage capacitorSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Feb 13, 2001·15 cites·3 claims
- 1852US7304485B2Analysis of the quality of contacts and vias in multi-metal fabrication processes of semiconductor devices, method and test chip architectureST MICROELECTRONICS SRL·Filed 2004·Granted Dec 4, 2007·3 cites·21 claims
- 1951US6686241B2Method of forming low-resistivity connections in non-volatile memoriesST MICROELECTRONICS SRL·Filed 2001·Granted Feb 3, 2004·6 cites·12 claims
- 2047US7320904B2Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuitST MICROELECTRONICS SRL·Filed 2006·Granted Jan 22, 2008·0 cites·14 claims
- 2147US5486486AProcess for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devicesST MICROELECTRONICS SRL·Filed 1994·Granted Jan 23, 1996·10 cites·8 claims
- 2245US7910978B2Process for manufacturing a memory device integrated on a semiconductor substrate and comprising nanocrystal memory cells and CMOS transistorsST MICROELECTRONICS SRL·Filed 2008·Granted Mar 22, 2011·0 cites·36 claims
- 2345US6399442B1Method of manufacturing an integrated semiconductor device having a nonvolatile floating gate memory, and related integrated deviceST MICROELECTRONICS SRL·Filed 1999·Granted Jun 4, 2002·6 cites·9 claims
- 2438US8450199B2Integrating diverse transistors on the same waferPIAZZA FAUSTO·Filed 2008·Granted May 28, 2013·0 cites·10 claims
- 2538US5075246AMethod of manufacturing integrated circuits having electronic components of two different types each having pairs of electrodes obtained from the same polycrystalline silicon layers and separated by different dielectric materialsSGS THOMSON MICROELECTRONICS·Filed 1990·Granted Dec 24, 1991·8 cites·12 claims
- 2638US2007026610A1Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structureST MICROELECTRONICS SRL·Filed 2006·Application pending·0 cites
- 2738US2007287290A1Manufacturing method for non-active electrically structures of an integrated electronic circuit formed on a semiconductor substrate and corresponding electronic circuitST MICROELECTRONICS SRL·Filed 2007·Application pending·0 cites
- 2836US6461922B1Method for the integration of resistors and esd self-protected transistors in an integrated device with a memory matrix manufactured by means of a process featuring self-aligned source (sas) formation and junction salicidationST MICROELECTRONICS SRL·Filed 1999·Granted Oct 8, 2002·4 cites·13 claims
- 2934US6355523B1Manufacturing process for making single polysilicon level flash EEPROM cellST MICROELECTRONICS SRL·Filed 1999·Granted Mar 12, 2002·2 cites·17 claims
- 3033US7078294B2Sealing method for electronic devices formed on a common semiconductor substrate and corresponding circuit structureST MICROELECTONICS SRL·Filed 2004·Granted Jul 18, 2006·0 cites·12 claims
- 3130US5600590AProcess for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devicesST MICROELECTRONICS SRL·Filed 1995·Granted Feb 4, 1997·0 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →