Inventor · disambiguated record
Hsilin Huang
Also filed as: HUANG HSILIN · HUANG HSILIN STEPHEN
27 granted patents·4 pending applications·246 citations·filing 2003–2023
96Inventor score
Top patents by PatentIndex Score
31 records- 0195US7545381B2Interruptible GPU and method for context saving and restoringVIA TECH INC·Filed 2005·Granted Jun 9, 2009·61 cites·9 claims
- 0294US7737983B2GPU pipeline multiple level synchronization controller processor and methodVIA TECH INC·Filed 2006·Granted Jun 15, 2010·39 cites·32 claims
- 0390US7583268B2Graphics pipeline precise interrupt method and apparatusVIA TECH INC·Filed 2005·Granted Sep 1, 2009·24 cites·19 claims
- 0485US10565207B2Method, system and program product for mask-based compression of a sparse matrixHUANG HSILIN·Filed 2017·Granted Feb 18, 2020·8 cites·17 claims
- 0581US7755632B2GPU internal wait/fence synchronization method and apparatusVIA TECH INC·Filed 2006·Granted Jul 13, 2010·8 cites·16 claims
- 0680US7580040B2Interruptible GPU and method for processing multiple contexts and runlistsVIA TECH INC·Filed 2005·Granted Aug 25, 2009·11 cites·19 claims
- 0780US7148888B2Head/data request in 3D graphicsVIA TECH INC·Filed 2003·Granted Dec 12, 2006·27 cites·16 claims
- 0879US7218331B2Bounding box in 3D graphicsVIA TECH INC·Filed 2003·Granted May 15, 2007·25 cites·10 claims
- 0978US9633451B2Image data processing method of multi-level shuffles for multi-format pixel and associated apparatusMEDIATEK SINGAPORE PTE LTD·Filed 2014·Granted Apr 25, 2017·4 cites·12 claims
- 1071US8817029B2GPU pipeline synchronization and control system and methodBROTHERS JOHN·Filed 2006·Granted Aug 26, 2014·5 cites·14 claims
- 1169US8004533B2Graphics input command stream scheduling method and apparatusVIA TECH INC·Filed 2006·Granted Aug 23, 2011·3 cites·25 claims
- 1265US11469772B2Method, system and program product for mask-based compression of a sparse matrixHUANG JOSHUA·Filed 2020·Granted Oct 11, 2022·1 cites·20 claims
- 1361US9304929B2Storage system having tag storage device with multiple tag entries associated with same data storage line for data recycling and related tag storage deviceMEDIATEK SINGAPORE PTE LTD·Filed 2013·Granted Apr 5, 2016·1 cites·18 claims
- 1461US7430654B2Dynamic instruction dependency monitor and control systemVIA TECH INC·Filed 2003·Granted Sep 30, 2008·11 cites·27 claims
- 1558US7696993B2Geometry primitive type conversion in a GPU pipelineVIA TECH INC·Filed 2007·Granted Apr 13, 2010·2 cites·20 claims
- 1657US9760492B2Method for controlling access of cache through using programmable hashing address and related cache controllerMEDIATEK SINGAPORE PTE LTD·Filed 2014·Granted Sep 12, 2017·1 cites·16 claims
- 1754US2024087175A1Sparsity compression for computer vision, language model and ai applicationHUANG JOSHUA·Filed 2023·Application pending·0 cites
- 1852US9535832B2Multi-hierarchy interconnect system and method for cache systemMEDIATEK SINGAPORE PTE LTD·Filed 2014·Granted Jan 3, 2017·0 cites·20 claims
- 1950US7072998B2Method and system for optimized FIFO full conduction controlVIA TECH INC·Filed 2003·Granted Jul 4, 2006·2 cites·3 claims
- 2049US9430394B2Storage system having data storage lines with different data storage line sizesMEDIATEK SINGAPORE PTE LTD·Filed 2013·Granted Aug 30, 2016·0 cites·16 claims
- 2148US7088359B2Vertex reordering in 3D graphicsVIA TECH INC·Filed 2003·Granted Aug 8, 2006·5 cites·15 claims
- 2246US7310096B2HEAD/DATA request in 3D graphicsS3 GRAPHICS CO LTD·Filed 2006·Granted Dec 18, 2007·0 cites·31 claims
- 2346US6853929B2Pipeline control for power managementVIA TECH INC·Filed 2003·Granted Feb 8, 2005·6 cites·20 claims
- 2445US7259765B2Head/data scheduling in 3D graphicsS3 GRAPHICS CO LTD·Filed 2003·Granted Aug 21, 2007·2 cites·13 claims
- 2543US7467242B2Method and system for dynamic FIFO flow controlVIA TECH INC·Filed 2003·Granted Dec 16, 2008·0 cites·50 claims
- 2642US9703605B2Fine-grained heterogeneous computingMEDIATEK INC·Filed 2015·Granted Jul 11, 2017·0 cites·20 claims
- 2741US2004199672A1System and method for high speed handshakingFiled 2003·Application pending·0 cites
- 2839US7154499B2Two-level rejection in 3D graphicsVIA TECH INC·Filed 2003·Granted Dec 26, 2006·0 cites·7 claims
- 2936US9659407B2Preemptive flushing of spatial selective bins for deferred graphics processingMEDIATEK SINGAPORE PTE LTD·Filed 2015·Granted May 23, 2017·0 cites·20 claims
- 3035US2016210231A1Heterogeneous system architecture for shared memoryMEDIATEK SINGAPORE PTE LTD·Filed 2015·Application pending·0 cites
- 3129US2016035128A1Graphics processing system for performing deferred vertex attribute shading based on split vertex bitstreams and related graphics processing methodMEDIATEK SINGAPORE PTE LTD·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →