Inventor · disambiguated record
Srisai R. Seethamraju
Also filed as: SEETHAMRAJU SRISAI R · SEETHAMRAJU SRISAI RAO
17 granted patents·2 pending applications·152 citations·filing 2005–2022
93Inventor score
Top patents by PatentIndex Score
19 records- 0198US11038521B1Spur and quantization noise cancellation for PLLS with non-linear phase detectionSILICON LAB INC·Filed 2020·Granted Jun 15, 2021·13 cites·20 claims
- 0294US7405628B2Technique for switching between input clocks in a phase-locked loopSILICON LAB INC·Filed 2006·Granted Jul 29, 2008·41 cites·24 claims
- 0393US10840897B1Noise canceling technique for a sine to square wave converterSILICON LAB INC·Filed 2019·Granted Nov 17, 2020·12 cites·20 claims
- 0491US7443250B2Programmable phase-locked loop responsive to a selected bandwidth and a selected reference clock signal frequency to adjust circuit characteristicsSILICON LAB INC·Filed 2006·Granted Oct 28, 2008·28 cites·31 claims
- 0589US11764913B2Jitter self-test using timestampsSKYWORKS SOLUTIONS INC·Filed 2022·Granted Sep 19, 2023·2 cites·16 claims
- 0689US11496234B2Synchronizing update of time of day counters using time stamp exchange over a control planeSKYWORKS SOLUTIONS INC·Filed 2018·Granted Nov 8, 2022·8 cites·14 claims
- 0789US9444406B1Amplifier topology achieving high DC gain and wide output voltage rangeSILICON LAB INC·Filed 2015·Granted Sep 13, 2016·9 cites·20 claims
- 0888US11228403B2Jitter self-test using timestampsSILICON LAB INC·Filed 2019·Granted Jan 18, 2022·3 cites·20 claims
- 0986US11316522B2Correction for period error in a reference clock signalSILICON LAB INC·Filed 2020·Granted Apr 26, 2022·3 cites·21 claims
- 1086US8242849B1Compensation for crystal offset in PLL-based crystal oscillatorsSEETHAMRAJU SRISAI R·Filed 2011·Granted Aug 14, 2012·10 cites·20 claims
- 1183US11245406B2Method for generation of independent clock signals from the same oscillatorSILICON LAB INC·Filed 2020·Granted Feb 8, 2022·3 cites·22 claims
- 1277US8823414B2Multiple signal format output driver with configurable internal loadTHIRUGNANAM RAJESH·Filed 2012·Granted Sep 2, 2014·7 cites·22 claims
- 1370US9207704B2Glitchless clock switching that handles stopped clocksSILICON LAB INC·Filed 2012·Granted Dec 8, 2015·3 cites·20 claims
- 1468US8532243B2Digital hold in a phase-locked loopSEETHAMRAJU SRISAI R·Filed 2007·Granted Sep 10, 2013·7 cites·23 claims
- 1560US2023223944A1Phase noise performance using multiple resonators with varying quality factors and frequenciesSKYWORKS SOLUTIONS INC·Filed 2022·Application pending·0 cites
- 1657US2022407526A1Phase noise performance using multiple resonators with varying quality factors and frequenciesSKYWORKS SOLUTIONS INC·Filed 2021·Application pending·0 cites
- 1753US7459948B2Phase adjustment for a divider circuitSILICON LAB INC·Filed 2005·Granted Dec 2, 2008·3 cites·14 claims
- 1845US10404209B2Compensating for thermal lag in temperature compensated crystal oscillatorsSILICON LAB INC·Filed 2016·Granted Sep 3, 2019·0 cites·12 claims
- 1942US10164643B2Compensating for temperature-dependent hysteresis in a temperature compensated crystal oscillatorSILICON LAB INC·Filed 2016·Granted Dec 25, 2018·0 cites·23 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →