Inventor · disambiguated record
Joseph Franklin Logan
Also filed as: LOGAN JOSEPH F · LOGAN JOSEPH FRANKLIN
39 granted patents·3 pending applications·1,019 citations·filing 1995–2013
98Inventor score
Files withIBM38CALVIGNAC JEAN L1DROZ PATRICK1IMMING KERRY CHRISTOPHER1INTERNAT BUSINESS MAHINES CORP1
Top patents by PatentIndex Score
42 records- 0196US6836480B2Data structures for efficient processing of multicast transmissionsIBM·Filed 2001·Granted Dec 28, 2004·180 cites·12 claims
- 0293US6937606B2Data structures for efficient processing of IP fragmentation and reassemblyIBM·Filed 2001·Granted Aug 30, 2005·98 cites·12 claims
- 0391US6334162B1Efficient data transfer mechanism for input/out devices having a device driver generating a descriptor queue and monitoring a status queueIBM·Filed 2000·Granted Dec 25, 2001·51 cites·4 claims
- 0489US6910092B2Chip to chip interface for interconnecting chipsIBM·Filed 2001·Granted Jun 21, 2005·60 cites·27 claims
- 0588US5608876AAdd-in board with enable-disable expansion ROM for PCI bus computersIBM·Filed 1995·Granted Mar 4, 1997·166 cites·18 claims
- 0683US7149212B2Apparatus, method and limited set of messages to transmit data between scheduler and a network processorIBM·Filed 2002·Granted Dec 12, 2006·37 cites·15 claims
- 0780US7412546B2System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second positionIBM·Filed 2005·Granted Aug 12, 2008·6 cites·9 claims
- 0880US6987760B2High speed network processorIBM·Filed 2001·Granted Jan 17, 2006·31 cites·9 claims
- 0979US8169906B2Controlling ATM traffic using bandwidth allocation technologyDROZ PATRICK·Filed 2007·Granted May 1, 2012·7 cites·18 claims
- 1077US6658546B2Storing frame modification information in a bank in memoryIBM·Filed 2001·Granted Dec 2, 2003·23 cites·13 claims
- 1175US7293158B2Systems and methods for implementing counters in a network processor with cost effective memoryIBM·Filed 2005·Granted Nov 6, 2007·6 cites·20 claims
- 1273US6049842AEfficient data transfer mechanism for input/output devicesIBM·Filed 1997·Granted Apr 11, 2000·46 cites·19 claims
- 1370US7085266B2Apparatus, method and limited set of messages to transmit data between components of a network processorIBM·Filed 2002·Granted Aug 1, 2006·14 cites·33 claims
- 1468US7483429B2Method and system for flexible network processor scheduler and data flowIBM·Filed 2005·Granted Jan 27, 2009·3 cites·2 claims
- 1568US6996650B2Method and apparatus for implementing multiple configurable sub-busses of a point-to-point busIBM·Filed 2002·Granted Feb 7, 2006·14 cites·20 claims
- 1668US6757795B2Apparatus and method for efficiently sharing memory bandwidth in a network processorIBM·Filed 2002·Granted Jun 29, 2004·15 cites·31 claims
- 1768US5905913ASystem for collecting a specified number of peripheral interrupts and transferring the interrupts as a group to the processorIBM·Filed 1997·Granted May 18, 1999·55 cites·10 claims
- 1868US5737524AAdd-in board with programmable configuration registers for use in PCI bus computersIBM·Filed 1995·Granted Apr 7, 1998·56 cites·21 claims
- 1966US7643511B2Frame alteration logic for network processorsIBM·Filed 2008·Granted Jan 5, 2010·3 cites·22 claims
- 2065US7995472B2Flexible network processor scheduler and data flowIBM·Filed 2009·Granted Aug 9, 2011·2 cites·15 claims
- 2164US7627701B2Indicating last data buffer by last bit flag bitIBM·Filed 2008·Granted Dec 1, 2009·1 cites·6 claims
- 2264US7474672B2Frame alteration logic for network processorsIBM·Filed 2003·Granted Jan 6, 2009·8 cites·8 claims
- 2363US7317727B2Method and systems for controlling ATM traffic using bandwidth allocation technologyIBM·Filed 2003·Granted Jan 8, 2008·6 cites·36 claims
- 2463US6185207B1Communication system having a local area network adapter for selectively deleting information and method thereforIBM·Filed 1997·Granted Feb 6, 2001·26 cites·25 claims
- 2562US7904617B2Indicating data buffer by last bit flagINTERNAT BUSINESS MAHINES CORP·Filed 2008·Granted Mar 8, 2011·1 cites·9 claims
- 2662US6681340B2Efficient implementation of error correction code schemeIBM·Filed 2001·Granted Jan 20, 2004·7 cites·22 claims
- 2762US6532185B2Distribution of bank accesses in a multiple bank DRAM used as a data bufferIBM·Filed 2001·Granted Mar 11, 2003·8 cites·16 claims
- 2861US7130916B2Linking frame data by inserting qualifiers in control blocksIBM·Filed 2001·Granted Oct 31, 2006·6 cites·10 claims
- 2960US9041572B1Testing a digital-to-analog converterIBM·Filed 2013·Granted May 26, 2015·2 cites·18 claims
- 3059US7072347B2Assignment of packet descriptor field positions in a network processorIBM·Filed 2001·Granted Jul 4, 2006·5 cites·10 claims
- 3158US6272564B1Efficient data transfer mechanism for input/output devicesIBM·Filed 1999·Granted Aug 7, 2001·22 cites·4 claims
- 3255US7200696B2System method structure in network processor that indicates last data buffer of frame packet by last flag bit that is either in first or second positionIBM·Filed 2001·Granted Apr 3, 2007·2 cites·6 claims
- 3354US2008285455A1Medium and system for controlling atm traffic using bandwidth allocation technologyIBM·Filed 2008·Application pending·0 cites
- 3451US6163820AEfficient data transfer mechanism for input/output devicesIBM·Filed 1999·Granted Dec 19, 2000·16 cites·5 claims
- 3548US7506081B2System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memoriesIBM·Filed 2004·Granted Mar 17, 2009·0 cites·11 claims
- 3648US7330478B2Method, apparatus, and computer program product for implementing pointer and stake model for frame alteration code in a network processorIBM·Filed 2003·Granted Feb 12, 2008·0 cites·5 claims
- 3748US6073181AMulti-buffer error detection for an open data-link interface LAN adapterIBM·Filed 1997·Granted Jun 6, 2000·24 cites·18 claims
- 3847US6338102B1Efficient data transfer mechanism for input/output devices having a device driver generating a descriptor queue and monitoring a status queueIBM·Filed 1999·Granted Jan 8, 2002·12 cites·5 claims
- 3947US2007002172A1Linking frame data by inserting qualifiers in control blocksCALVIGNAC JEAN L·Filed 2006·Application pending·0 cites
- 4046US8170024B2Implementing pointer and stake model for frame alteration code in a network processorIMMING KERRY CHRISTOPHER·Filed 2007·Granted May 1, 2012·0 cites·13 claims
- 4145US7466715B2Flexible control block format for frame description and managementIBM·Filed 2005·Granted Dec 16, 2008·0 cites·10 claims
- 4244US2002071321A1System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memoriesIBM·Filed 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →