Inventor · disambiguated record
Noboru Moriuchi
Also filed as: MORIUCHI NOBORU
16 granted patents·591 citations·filing 1988–2001
95Inventor score
Top patents by PatentIndex Score
16 records- 0194US5196910ASemiconductor memory device with recessed array regionHITACHI LTD·Filed 1991·Granted Mar 23, 1993·108 cites·21 claims
- 0293US5466325AResist removing method, and curable pressure-sensitive adhesive, adhesive sheets and apparatus used for the methodNITTO DENKO CORP·Filed 1994·Granted Nov 14, 1995·83 cites·2 claims
- 0393US5298365AProcess for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the processHITACHI LTD·Filed 1993·Granted Mar 29, 1994·59 cites·7 claims
- 0492US4882289AMethod of making a semiconductor memory device with recessed array regionHITACHI LTD·Filed 1988·Granted Nov 21, 1989·85 cites·7 claims
- 0584US5436095AManufacturing method or an exposing method for a semiconductor device for a semiconductor integrated circuit device and a mask used thereforHITACHI LTD·Filed 1992·Granted Jul 25, 1995·65 cites·26 claims
- 0674US5455144AProcess for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the processHITACHI LTD·Filed 1994·Granted Oct 3, 1995·19 cites·3 claims
- 0771US5667941AProcess for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the processHITACHI LTD·Filed 1995·Granted Sep 16, 1997·17 cites·23 claims
- 0870US6153357AProcess for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the processHITACHI LTD·Filed 1997·Granted Nov 28, 2000·16 cites·85 claims
- 0970US5753416AProcess for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the processHITACHI LTD·Filed 1995·Granted May 19, 1998·16 cites·20 claims
- 1067US5736300AManufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used thereforHITACHI LTD·Filed 1996·Granted Apr 7, 1998·25 cites·25 claims
- 1164US5405810AAlignment method and apparatusHITACHI LTD·Filed 1992·Granted Apr 11, 1995·36 cites·31 claims
- 1261US5725971AMethod of manufacturing phase shift masks and a method of manufacturing semiconductor integrated circuit devicesHITACHI LTD·Filed 1996·Granted Mar 10, 1998·22 cites·19 claims
- 1359US6794118B2Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the processRENESAS TECH CORP·Filed 2001·Granted Sep 21, 2004·4 cites·1 claims
- 1459USRE38296ESemiconductor memory device with recessed array regionHITACHI LTD·Filed 1995·Granted Nov 4, 2003·17 cites·44 claims
- 1557USRE37996EManufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used thereforHITACHI LTD·Filed 2000·Granted Feb 18, 2003·4 cites·34 claims
- 1655US5578422AManufacturing method or an exposing method for a semiconductor device or a semiconductor integrated circuit device and a mask used thereforHITACHI LTD·Filed 1995·Granted Nov 26, 1996·15 cites·41 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →