Inventor · disambiguated record
Peter Storck
Also filed as: STORCK PETER
13 granted patents·5 pending applications·63 citations·filing 2001–2022
89Inventor score
Files withSILTRONIC AG11STORCK PETER3WACKER SILTRONIC HALBLEITERMAT2FRANCOTYP-POSTALIA GMBH1SCHROEDER THOMAS1
Top patents by PatentIndex Score
18 records- 0187US7785706B2Semiconductor wafer and process for its productionSILTRONIC AG·Filed 2008·Granted Aug 31, 2010·14 cites·20 claims
- 0278US8268076B2SOI wafers having MxOy oxide layers on a substrate wafer and an amorphous interlayer adjacent the substrate waferSCHROEDER THOMAS·Filed 2010·Granted Sep 18, 2012·7 cites·7 claims
- 0378US6630024B2Method for the production of an epitaxially grown semiconductor waferWACKER SILTRONIC HALBLEITERMAT·Filed 2001·Granted Oct 7, 2003·19 cites·25 claims
- 0475US8093143B2Method for producing a wafer comprising a silicon single crystal substrate having a front and a back side and a layer of SiGe deposited on the front sideSTORCK PETER·Filed 2010·Granted Jan 10, 2012·4 cites·6 claims
- 0570US7723214B2Multilayer structure comprising a substrate and a layer of silicon and germanium deposited heteroepitaxially thereon, and a process for producing itSILTRONIC AG·Filed 2005·Granted May 25, 2010·3 cites·15 claims
- 0668US6995077B2Epitaxially coated semiconductor wafer and process for producing itSILTRONIC AG·Filed 2003·Granted Feb 7, 2006·13 cites·13 claims
- 0756US8115195B2Semiconductor wafer with a heteroepitaxial layer and a method for producing the waferSTORCK PETER·Filed 2009·Granted Feb 14, 2012·1 cites·2 claims
- 0854US2010019278A1Multilayer Structure Comprising A Substrate and A Layer Of Silicon and Germanium Deposited Heteroepitaxially Thereon, and A Process For Producing ItSILTRONIC AG·Filed 2009·Application pending·0 cites
- 0952US12437989B2Method for depositing a silicon germanium layer on a substrateSILTRONIC AG·Filed 2021·Granted Oct 7, 2025·0 cites·7 claims
- 1052US10192739B2Layered semiconductor substrate with reduced bow having a group III nitride layer and method for manufacturing itSTORCK PETER·Filed 2012·Granted Jan 29, 2019·1 cites·13 claims
- 1151US2025101576A1Method for depositing a strain relaxed graded buffer layer of silicon germanium on a surface of a substrateSILTRONIC AG·Filed 2022·Application pending·0 cites
- 1247US9923050B2Semiconductor wafer and a method for producing the semiconductor waferSILTRONIC AG·Filed 2014·Granted Mar 20, 2018·0 cites·12 claims
- 1345US9691632B2Epitaxial wafer and a method of manufacturing thereofSILTRONIC AG·Filed 2013·Granted Jun 27, 2017·0 cites·20 claims
- 1445US6887775B2Process and apparatus for epitaxially coating a semiconductor wafer and epitaxially coated semiconductor waferSILTRONIC AG·Filed 2003·Granted May 3, 2005·1 cites·9 claims
- 1544US2001024587A1Franking machine with language switchingFRANCOTYP POSTALIA GMBH·Filed 2001·Application pending·0 cites
- 1643US2009236695A1Semiconductor Wafer With A Heteroepitaxial Layer And A Method For Producing The WaferSILTRONIC AG·Filed 2009·Application pending·0 cites
- 1742US2005103261A1Epitaxially coated semiconductor waferWACKER SILTRONIC HALBLEITERMAT·Filed 2004·Application pending·0 cites
- 1841US12313578B2Method for producing semiconductor wafersSILTRONIC AG·Filed 2020·Granted May 27, 2025·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →