Inventor · disambiguated record
Daniel Cutter
Also filed as: CUTTER DANIEL · CUTTER DANIEL F · CUTTER DANIEL R
17 granted patents·4 pending applications·919 citations·filing 1999–2015
95Inventor score
Technology areasG06F
Top patents by PatentIndex Score
21 records- 0196US6728845B2SRAM controller for parallel processor architecture and method for controlling access to a RAM using read and read/write queuesINTEL CORP·Filed 2002·Granted Apr 27, 2004·119 cites·18 claims
- 0296US6694380B1Mapping requests from a processing unit that uses memory-mapped input-output spaceINTEL CORP·Filed 1999·Granted Feb 17, 2004·227 cites·27 claims
- 0394US6681300B2Read lock miss control and queue managementINTEL CORP·Filed 2001·Granted Jan 20, 2004·89 cites·18 claims
- 0493US6631462B1Memory shared between processing threadsINTEL CORP·Filed 2000·Granted Oct 7, 2003·74 cites·29 claims
- 0592US6427196B1SRAM controller for parallel processor architecture including address and command queue and arbiterINTEL CORP·Filed 1999·Granted Jul 30, 2002·152 cites·17 claims
- 0691US6671827B2Journaling for parallel hardware threads in multithreaded processorINTEL CORP·Filed 2000·Granted Dec 30, 2003·75 cites·21 claims
- 0789US8020142B2Hardware acceleratorINTEL CORP·Filed 2006·Granted Sep 13, 2011·21 cites·23 claims
- 0889US7725624B2System and method for cryptography processing units and multiplierINTEL CORP·Filed 2005·Granted May 25, 2010·20 cites·20 claims
- 0985US8073892B2Cryptographic system, method and multiplierFEGHALI WAJDI K·Filed 2005·Granted Dec 6, 2011·22 cites·32 claims
- 1085US7305500B2Sram controller for parallel processor architecture including a read queue and an order queue for handling requestsINTEL CORP·Filed 2004·Granted Dec 4, 2007·31 cites·23 claims
- 1183US6324624B1Read lock miss control and queue managementINTEL CORP·Filed 1999·Granted Nov 27, 2001·88 cites·24 claims
- 1271US9128818B2Memory mapping in a processor having multiple programmable unitsINTEL CORP·Filed 2014·Granted Sep 8, 2015·1 cites·16 claims
- 1360US9830284B2Memory mapping in a processor having multiple programmable unitsINTEL CORP·Filed 2015·Granted Nov 28, 2017·0 cites·4 claims
- 1459US9830285B2Memory mapping in a processor having multiple programmable unitsINTEL CORP·Filed 2015·Granted Nov 28, 2017·0 cites·1 claims
- 1559US9824037B2Memory mapping in a processor having multiple programmable unitsINTEL CORP·Filed 2015·Granted Nov 21, 2017·0 cites·2 claims
- 1659US9824038B2Memory mapping in a processor having multiple programmable unitsINTEL CORP·Filed 2015·Granted Nov 21, 2017·0 cites·3 claims
- 1748US2007192626A1Exponent windowingFEGHALI WAJDI K·Filed 2006·Application pending·0 cites
- 1846US2004039895A1Memory shared between processing threadsINTEL CORP A CALIFORNIA CORP·Filed 2003·Application pending·0 cites
- 1946US2007157030A1Cryptographic system componentFEGHALI WAJDI K·Filed 2005·Application pending·0 cites
- 2042US8738886B2Memory mapping in a processor having multiple programmable unitsWOLRICH GILBERT·Filed 2004·Granted May 27, 2014·0 cites·8 claims
- 2140US2007192571A1Programmable processing unit providing concurrent datapath operation of multiple instructionsFEGHALI WAJDI K·Filed 2006·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Daniel Cutter files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →