Inventor · disambiguated record
Hsien-Pao Yang
Also filed as: YANG HSIEN-PAO
4 granted patents·1 pending application·3 citations·filing 2005–2020
60Inventor score
Top patents by PatentIndex Score
5 records- 0176US10541018B2DDR memory bus with a reduced data strobe signal preamble timespanINTEL CORP·Filed 2017·Granted Jan 21, 2020·2 cites·20 claims
- 0254US11074959B2DDR memory bus with a reduced data strobe signal preamble timespanINTEL CORP·Filed 2020·Granted Jul 27, 2021·0 cites·17 claims
- 0354US10672438B2Dynamic reconfigurable dual power I/O receiverINTEL CORP·Filed 2018·Granted Jun 2, 2020·1 cites·20 claims
- 0447US10923164B2Dual power I/O transmitterINTEL CORP·Filed 2018·Granted Feb 16, 2021·0 cites·18 claims
- 0538US2007005826A1Termination control in memory systemsYANG HSIEN-PAO·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →