Inventor · disambiguated record
Vivien Renauld
Also filed as: RENAULD VIVIEN
4 granted patents·2 citations·filing 2006–2015
57Inventor score
Files withSOITEC SILICON ON INSULATOR4
Top patents by PatentIndex Score
4 records- 0155US7601606B2Method for reducing the trap density in a semiconductor waferSOITEC SILICON ON INSULATOR·Filed 2006·Granted Oct 13, 2009·2 cites·19 claims
- 0245US7544058B2Method for high-temperature annealing a multilayer waferSOITEC SILICON ON INSULATOR·Filed 2007·Granted Jun 9, 2009·0 cites·13 claims
- 0342US7585793B2Method for applying a high temperature heat treatment to a semiconductor waferSOITEC SILICON ON INSULATOR·Filed 2006·Granted Sep 8, 2009·0 cites·15 claims
- 0424US9583341B2Layer transferring processSOITEC SILICON ON INSULATOR·Filed 2015·Granted Feb 28, 2017·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →