Inventor · disambiguated record
Jorg Radecker
Also filed as: RADECKER JOERG · RADECKER JOERG S · RADECKER JORG
7 granted patents·3 pending applications·27 citations·filing 2002–2012
79Inventor score
Top patents by PatentIndex Score
10 records- 0177US8415214B2STI silicon nitride cap for flat FEOL topologyJAKUBOWSKI FRANK·Filed 2011·Granted Apr 9, 2013·5 cites·15 claims
- 0276US8642419B2Methods of forming isolation structures for semiconductor devicesKRONHOLZ STEPHAN·Filed 2012·Granted Feb 4, 2014·4 cites·9 claims
- 0369US7718475B2Method for manufacturing an integrated circuit including a transistorQIMONDA AG·Filed 2007·Granted May 18, 2010·4 cites·24 claims
- 0463US6908831B2Method for fabricating a semiconductor structure with an encapsulation of a filling which is used for filling trenchesINFINEON TECHNOLOGIES AG·Filed 2004·Granted Jun 21, 2005·14 cites·11 claims
- 0542US8853051B2Methods of recessing an active region and STI structures in a common etch processJAKUBOWSKI FRANK·Filed 2012·Granted Oct 7, 2014·0 cites·18 claims
- 0640US8679940B2Methods for fabricating semiconductor devices with isolation regions having uniform stepheightsJAKUBOWSKI FRANK·Filed 2012·Granted Mar 25, 2014·0 cites·20 claims
- 0740US2013221478A1Methods of forming isolation structures for semiconductor devices by employing a spin-on glass material or a flowable oxide materialKRONHOLZ STEPHAN·Filed 2012·Application pending·0 cites
- 0839US2013214392A1Methods of forming stepped isolation structures for semiconductor devices using a spacer techniqueKRONHOLZ STEPHAN·Filed 2012·Application pending·0 cites
- 0936US2007105302A1Integrated circuit formed on a semiconductor substrateINFINEON TECHNOLOGIES AG·Filed 2005·Application pending·0 cites
- 1033US7125778B2Method for fabricating a self-aligning maskINFINEON TECHNOLOGIES AG·Filed 2002·Granted Oct 24, 2006·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →