Inventor · disambiguated record
Didier Dutartre
Also filed as: DUTARTRE DIDIER
47 granted patents·16 pending applications·365 citations·filing 1985–2024
98Inventor score
Files withST MICROELECTRONICS SA32ST MICROELECTRONICS CROLLES 2 SAS13DUTARTRE DIDIER4ST MICROELECTRONICS CROLLES 23ST MICROELECTRONICS SRL3
Top patents by PatentIndex Score
63 records- 0191US9711550B2Pinned photodiode with a low dark currentST MICROELECTRONICS SA·Filed 2015·Granted Jul 18, 2017·9 cites·18 claims
- 0287US7906381B2Method for integrating silicon-on-nothing devices with standard CMOS devicesST MICROELECTRONICS SA·Filed 2008·Granted Mar 15, 2011·14 cites·10 claims
- 0386US6537894B2Process for fabricating a substrate of the silicon-on-insulator or silicon-on-nothing type and resulting deviceST MICROELECTRONICS SA·Filed 2001·Granted Mar 25, 2003·43 cites·19 claims
- 0483US9929039B2Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtainedST MICROELECTRONICS SA·Filed 2015·Granted Mar 27, 2018·3 cites·18 claims
- 0582US6177717B1Low-noise vertical bipolar transistor and corresponding fabrication processST MICROELECTRONICS SA·Filed 1999·Granted Jan 23, 2001·62 cites·16 claims
- 0678US10978340B2Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, and resulting structureST MICROELECTRONICS CROLLES 2 SAS·Filed 2019·Granted Apr 13, 2021·2 cites·19 claims
- 0778US2024274552A1Integrated circuit comprising a substrate equipped with a trap-rich region, and fabricating processST MICROELECTRONICS CROLLES 2 SAS·Filed 2024·Application pending·0 cites
- 0876US9759546B2Method for measuring thickness variations in a layer of a multilayer semiconductor structureSOITEC SILICON ON INSULATOR·Filed 2013·Granted Sep 12, 2017·3 cites·16 claims
- 0976US6472262B2Method for fabricating a bipolar transistor of the self-aligned double-polysilicon type with a heterojunction base and corresponding transistorST MICROELECTRONICS SA·Filed 2001·Granted Oct 29, 2002·23 cites·23 claims
- 1073US2023197868A1Integrated optical sensor of the single-photon avalanche photodiode type, and manufacturing methodST MICROELECTRONICS CROLLES 2 SAS·Filed 2023·Application pending·0 cites
- 1172US11978710B2Integrated circuit comprising a substrate equipped with a trap-rich region, and fabricating processST MICROELECTRONICS CROLLES 2 SAS·Filed 2021·Granted May 7, 2024·0 cites·17 claims
- 1272US2025393292A1Semiconductor chip manufacturing methodST MICROELECTRONICS SRL·Filed 2024·Application pending·0 cites
- 1372US2025126877A1Semiconductor chip manufacturing methodST MICROELECTRONICS SRL·Filed 2024·Application pending·0 cites
- 1471US7776745B2Method for etching silicon-germanium in the presence of siliconST MICROELECTRONICS SA·Filed 2007·Granted Aug 17, 2010·4 cites·3 claims
- 1571US6132806AMethod of implementation of MOS transistor gates with a high contentSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Oct 17, 2000·29 cites·6 claims
- 1671US5994676AMethod for calibrating the temperature of an epitaxy reactorSGS THOMSON MICROELECTRONICS·Filed 1997·Granted Nov 30, 1999·25 cites·28 claims
- 1770US6238941B1Characterizing of silicon-germanium areas on siliconST MICROELECTRONICS SA·Filed 2000·Granted May 29, 2001·10 cites·3 claims
- 1869US6744080B2Method of manufacturing a bipolar transistor of double-polysilicon, heterojunction-base type and corresponding transistorST MICROELECTRONICS SA·Filed 2002·Granted Jun 1, 2004·15 cites·12 claims
- 1968US12211754B2Semiconductor chip manufacturing methodST MICROELECTRONICS SRL·Filed 2022·Granted Jan 28, 2025·0 cites·18 claims
- 2067US11562927B2Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, and resulting structureST MICROELECTRONICS CROLLES 2 SAS·Filed 2021·Granted Jan 24, 2023·0 cites·15 claims
- 2165US10263110B2Method of forming strained MOS transistorsST MICROELECTRONICS CROLLES 2 SAS·Filed 2016·Granted Apr 16, 2019·1 cites·10 claims
- 2264US4725561AProcess for the production of mutually electrically insulated monocrystalline silicon islands using laser recrystallizationHAOND MICHEL·Filed 1985·Granted Feb 16, 1988·32 cites·17 claims
- 2364US2021151616A1Integrated optical sensor of the single-photon avalanche photodiode type, and manufacturing methodST MICROELECTRONICS CROLLES 2 SAS·Filed 2020·Application pending·0 cites
- 2462US8975154B2Process for producing at least one deep trench isolationST MICROELECTRONICS CROLLES 2·Filed 2012·Granted Mar 10, 2015·2 cites·18 claims
- 2562US7776679B2Method for forming silicon wells of different crystallographic orientationsST MICROELECTRONICS CROLLES 2·Filed 2008·Granted Aug 17, 2010·1 cites·18 claims
- 2661US7892927B2Transistor with a channel comprising germaniumST MICROELECTRONICS SA·Filed 2007·Granted Feb 22, 2011·2 cites·20 claims
- 2761US5252181AMethod for cleaning the surface of a substrate with plasmaAUTONOME DE DROIT PUBLIC FRANC·Filed 1991·Granted Oct 12, 1993·36 cites·7 claims
- 2860US11757054B2Integrated optical sensor with pinned photodiodesST MICROELECTRONICS CROLLES 2 SAS·Filed 2021·Granted Sep 12, 2023·0 cites·80 claims
- 2960US11075177B2Integrated circuit comprising a substrate equipped with a trap-rich region, and fabricating processST MICROELECTRONICS CROLLES 2 SAS·Filed 2019·Granted Jul 27, 2021·0 cites·14 claims
- 3060US6776842B2Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenicST MICROELECTRONICS SA·Filed 2002·Granted Aug 17, 2004·4 cites·20 claims
- 3159US8158495B2Process for forming a silicon-based single-crystal portionDUTARTRE DIDIER·Filed 2007·Granted Apr 17, 2012·2 cites·25 claims
- 3257US10535552B2Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtainedST MICROELECTRONICS SA·Filed 2018·Granted Jan 14, 2020·0 cites·18 claims
- 3357US2023361151A1Method for manufacturing microlensesST MICROELECTRONICS CROLLES 2 SAS·Filed 2023·Application pending·0 cites
- 3455US6656812B1Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication processST MICROELECTRONICS SA·Filed 2000·Granted Dec 2, 2003·8 cites·14 claims
- 3554US6873088B2Vibratory beam electromechanical resonatorST MICROELECTRONICS SA·Filed 2002·Granted Mar 29, 2005·6 cites·49 claims
- 3654US6642096B2Bipolar transistor manufacturingST MICROELECTRONICS SA·Filed 2001·Granted Nov 4, 2003·6 cites·22 claims
- 3753US9312408B2Imager having a reduced dark current through an increased bulk doping levelST MICROELECTRONICS SA·Filed 2015·Granted Apr 12, 2016·0 cites·12 claims
- 3852US10658578B2Memory cell comprising a phase-change materialST MICROELECTRONICS CROLLES 2 SAS·Filed 2018·Granted May 19, 2020·0 cites·16 claims
- 3951US10262898B2Method for forming an electrical contact between a semiconductor film and a bulk handle wafer, and resulting structureST MICROELECTRONICS SA·Filed 2016·Granted Apr 16, 2019·0 cites·15 claims
- 4051US9704903B2Front-side imager having a reduced dark current on SOI substrateST MICROELECTRONICS SA·Filed 2015·Granted Jul 11, 2017·0 cites·14 claims
- 4149US6642108B2Fabrication processes for semiconductor non-volatile memory deviceST MICROELECTRONICS SA·Filed 2002·Granted Nov 4, 2003·4 cites·20 claims
- 4249US6583451B2Process for fabricating a network of nanometric lines made of single-crystal silicon and device obtainedST MICROELECTRONICS SA·Filed 2000·Granted Jun 24, 2003·3 cites·25 claims
- 4349US2017271392A1Front-Side Imager Having a Reduced Dark Current on a SOI SubstrateST MICROELECTRONICS SA·Filed 2017·Application pending·0 cites
- 4445US8975730B2Method for protection of a layer of a vertical stack and corresponding deviceST MICROELECTRONICS CROLLES 2·Filed 2012·Granted Mar 10, 2015·0 cites·10 claims
- 4545US7622368B2Forming of a single-crystal semiconductor layer portion separated from a substrateST MICROELECTRONICS SA·Filed 2007·Granted Nov 24, 2009·0 cites·14 claims
- 4645US2014363953A1Method for forming components on a silicon-germanium layerST MICROELECTRONICS SA·Filed 2014·Application pending·0 cites
- 4744US8168536B2Realization of self-positioned contacts by epitaxyDUTARTRE DIDIER·Filed 2008·Granted May 1, 2012·0 cites·15 claims
- 4843US2019131520A1Memory cell comprising a phase-change materialST MICROELECTRONICS CROLLES 2 SAS·Filed 2018·Application pending·0 cites
- 4942US6162706AMethod of epitaxy on a silicon substrate comprising areas heavily doped with arsenicST MICROELECTRONICS SA·Filed 1998·Granted Dec 19, 2000·6 cites·10 claims
- 5042US4678538AProcess for the production of an insulating support on an oriented monocrystalline silicon film with localized defectsFRANCE ETAT·Filed 1986·Granted Jul 7, 1987·6 cites·12 claims
Showing the top 50 of 63 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →