Inventor · disambiguated record
Mark Palmer
Also filed as: PALMER MARK · PALMER MARK J
9 granted patents·3 pending applications·295 citations·filing 1992–2019
90Inventor score
Top patents by PatentIndex Score
12 records- 0178US5289337AHeatspreader for cavity down multi-chip module with flip chipINTEL CORP·Filed 1992·Granted Feb 22, 1994·66 cites·9 claims
- 0274US6153829ASplit cavity wall plating for an integrated circuit packageINTEL CORP·Filed 1998·Granted Nov 28, 2000·56 cites·35 claims
- 0372US5721454AIntegrated circuit package with a plurality of vias that are electrically connected to an internal ground plane and thermally connected to an external heat slugINTEL CORP·Filed 1995·Granted Feb 24, 1998·44 cites·13 claims
- 0470US6810435B2Programmable identification in a communications controllerMICROCHIP TECH INC·Filed 2001·Granted Oct 26, 2004·18 cites·4 claims
- 0570US5483099AStandardized power and ground design for pin grid array packagesINTEL CORP·Filed 1994·Granted Jan 9, 1996·46 cites·18 claims
- 0667US6008988AIntegrated circuit package with a heat spreader coupled to a pair of electrical devicesINTEL CORP·Filed 1997·Granted Dec 28, 1999·37 cites·3 claims
- 0757US5691569AIntegrated circuit package that has a plurality of staggered pinsINTEL CORP·Filed 1995·Granted Nov 25, 1997·24 cites·8 claims
- 0845US7106101B2Functional pathway configuration at a system/IC interfaceAEGIS TECHNOLOGIES LLC·Filed 2001·Granted Sep 12, 2006·3 cites·9 claims
- 0942US2020361681A1Packaging substrateINNOVIA FILMS LTD·Filed 2019·Application pending·0 cites
- 1040US7020958B1Methods forming an integrated circuit package with a split cavity wallINTEL CORP·Filed 2000·Granted Apr 4, 2006·1 cites·23 claims
- 1137US2003033576A1Functional pathway configuration at a system/IC interfaceFiled 2001·Application pending·0 cites
- 1233US2004046243A1Methods of split cavity wall plating for an integrated circuit packageFiled 2003·Application pending·0 cites
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