Inventor · disambiguated record
Pedro Marcuello
Also filed as: MARCUELLO PEDRO · MARCUELLO PEDRO GABRIEL OLIVER
17 granted patents·9 pending applications·149 citations·filing 2003–2018
93Inventor score
Files withINTEL CORP11GIBERT CODINA ENRIC2XEKALAKIS POLYCHRONIS2BABY NOW S L1GIMENO CARLOS MADRILES1
Top patents by PatentIndex Score
26 records- 0190US8719806B2Speculative multi-threading for instruction prefetch and/or trace pre-buildWANG HONG·Filed 2010·Granted May 6, 2014·12 cites·14 claims
- 0283US8612698B2Replacement policy for hot code detectionLOPEZ PEDRO·Filed 2008·Granted Dec 17, 2013·16 cites·18 claims
- 0381US8185700B2Enabling speculative state information in a cache coherency protocolGIMENO CARLOS MADRILES·Filed 2006·Granted May 22, 2012·23 cites·15 claims
- 0481US8166282B2Multi-version register file for multithreading processors with live-in precomputationMADRILES CARLOS·Filed 2004·Granted Apr 24, 2012·47 cites·7 claims
- 0574US7458065B2Selection of spawning pairs for a speculative multithreaded processorINTEL CORP·Filed 2004·Granted Nov 25, 2008·24 cites·25 claims
- 0673US9542193B2Memory address collision detection of ordered parallel threads with bloom filtersINTEL CORP·Filed 2012·Granted Jan 10, 2017·3 cites·4 claims
- 0773US7814469B2Speculative multi-threading for instruction prefetch and/or trace pre-buildINTEL CORP·Filed 2003·Granted Oct 12, 2010·13 cites·20 claims
- 0866US9811341B2Managed instruction cache prefetchingSTAVROU KYRIAKOS A·Filed 2011·Granted Nov 7, 2017·4 cites·5 claims
- 0964US9940686B2Exploiting frame to frame coherency in a sort-middle architectureINTEL CORP·Filed 2014·Granted Apr 10, 2018·1 cites·32 claims
- 1059US10013326B2Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code regionMARTINEZ RAUL·Filed 2011·Granted Jul 3, 2018·1 cites·18 claims
- 1155US10101999B2Memory address collision detection of ordered parallel threads with bloom filtersINTEL CORP·Filed 2017·Granted Oct 16, 2018·0 cites·24 claims
- 1254US9904977B2Exploiting frame to frame coherency in a sort-middle architectureINTEL CORP·Filed 2016·Granted Feb 27, 2018·0 cites·40 claims
- 1353US9922393B2Exploiting frame to frame coherency in a sort-middle architectureINTEL CORP·Filed 2015·Granted Mar 20, 2018·0 cites·13 claims
- 1453US9374542B2Image signal processor with a block checking circuitINTEL CORP·Filed 2014·Granted Jun 21, 2016·0 cites·20 claims
- 1552US2019004916A1Profiling asynchronous events resulting from the execution of software at code region granularityINTEL CORP·Filed 2018·Application pending·0 cites
- 1649US8813057B2Branch pruning in architectures with speculation supportQUIÑONES CARLOS GARCÍA·Filed 2007·Granted Aug 19, 2014·1 cites·16 claims
- 1746USD785510SPramBABY NOW S L·Filed 2016·Granted May 2, 2017·4 cites·1 claims
- 1845US2004154010A1Control-quasi-independent-points guided speculative multithreadingFiled 2003·Application pending·0 cites
- 1942US10157063B2Instruction and logic for optimization level aware branch predictionINTEL CORP·Filed 2012·Granted Dec 18, 2018·0 cites·6 claims
- 2042US2014143526A1Branch Prediction GatingXEKALAKIS POLYCHRONIS·Filed 2012·Application pending·0 cites
- 2141US2006047495A1Analyzer for spawning pairs in speculative multithreaded processorSANCHEZ JESUS·Filed 2004·Application pending·0 cites
- 2240US2008134196A1Apparatus, System, and Method of a Memory Arrangement for Speculative MultithreadingINTEL CORP·Filed 2005·Application pending·0 cites
- 2340US2012311308A1Branch Predictor with Jump Ahead Logic to Jump Over Portions of Program Code Lacking BranchesXEKALAKIS POLYCHRONIS·Filed 2011·Application pending·0 cites
- 2438US2013268735A1Support for speculative ownership without dataGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 2537US2014156976A1Method, apparatus and system for selective execution of a commit instructionGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 2632US2013326199A1Method and apparatus for controlling a mxcsrMAGKLIS GRIGORIOS·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →