Inventor · disambiguated record
Jeong-Sik Nam
Also filed as: NAM JEONG LIM · NAM JEONG-SIK
12 granted patents·1 pending application·31 citations·filing 2001–2017
88Inventor score
Files withSAMSUNG ELECTRONICS CO LTD12
Top patents by PatentIndex Score
13 records- 0183US7307910B2Redundancy program circuit and methods thereofSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Dec 11, 2007·10 cites·19 claims
- 0268US7477565B2Redundancy program circuit and methods thereofSAMSUNG ELECTRONICS CO LTD·Filed 2007·Granted Jan 13, 2009·4 cites·5 claims
- 0367US10163741B2Scribe lane structure in which pad including via hole is arranged on sawing lineSAMSUNG ELECTRONICS CO LTD·Filed 2017·Granted Dec 25, 2018·1 cites·11 claims
- 0467US7414455B2Digital temperature detection circuit for semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Aug 19, 2008·6 cites·26 claims
- 0566US7549796B2Digital temperature detection circuit adapted for use with semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2007·Granted Jun 23, 2009·3 cites·18 claims
- 0659US7606090B2Redundancy program circuit and methods thereofSAMSUNG ELECTRONICS CO LTD·Filed 2008·Granted Oct 20, 2009·2 cites·4 claims
- 0752US7692995B2Redundancy program circuit and methods thereofSAMSUNG ELECTRONICS CO LTD·Filed 2008·Granted Apr 6, 2010·1 cites·2 claims
- 0852US7599234B2Semiconductor memory devices having signal delay controller and methods performed thereinSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Oct 6, 2009·2 cites·16 claims
- 0944US7609580B2Redundancy program circuit and methods thereofSAMSUNG ELECTRONICS CO LTD·Filed 2008·Granted Oct 27, 2009·0 cites·12 claims
- 1042US7978002B2Voltage boosting circuit and semiconductor deviceSAMSUNG ELECTRONICS CO LTD·Filed 2009·Granted Jul 12, 2011·0 cites·8 claims
- 1141US8027219B2Semiconductor memory devices having signal delay controller and methods performed thereinSAMSUNG ELECTRONICS CO LTD·Filed 2009·Granted Sep 27, 2011·0 cites·16 claims
- 1238US6847253B2Half voltage generator having low power consumptionSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Jan 25, 2005·2 cites·21 claims
- 1329US2002047209A1Method for forming contact hole for dual damascene interconnection of semiconductor device and resultant structureFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →