Inventor · disambiguated record
Cyrus Y. Tsui
Also filed as: TSUI CYRUS · TSUI CYRUS Y
34 granted patents·1,457 citations·filing 1983–2003
98Inventor score
Top patents by PatentIndex Score
34 records- 0198US5835405AApplication specific modules in a programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 1997·Granted Nov 10, 1998·249 cites·41 claims
- 0297US6828823B1Non-volatile and reconfigurable programmable logic devicesLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Dec 7, 2004·105 cites·26 claims
- 0396US6356107B1Method and structure dynamic in-system programmingLATTICE SEMICONDUCTOR CORP·Filed 2000·Granted Mar 12, 2002·82 cites·6 claims
- 0496US4684830AOutput circuit for a programmable logic arrayMONOLITHIC MEMORIES INC·Filed 1985·Granted Aug 4, 1987·104 cites·21 claims
- 0595US5412260AMultiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 1993·Granted May 2, 1995·84 cites·14 claims
- 0694US6034541AIn-system programmable interconnect circuitLATTICE SEMICONDUCTOR CORP·Filed 1997·Granted Mar 7, 2000·150 cites·16 claims
- 0793US6304099B1Method and structure for dynamic in-system programmingLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted Oct 16, 2001·79 cites·5 claims
- 0891US6229336B1Programmable integrated circuit device with slew control and skew controlLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted May 8, 2001·77 cites·33 claims
- 0989US6765408B2Device and method with generic logic blocksLATTICE SEMICONDUCTOR CORP·Filed 2002·Granted Jul 20, 2004·30 cites·36 claims
- 1084US5394033AStructure and method for implementing hierarchical routing pools in a programmable logic circuitLATTICE SEMICONDUCTOR CORP·Filed 1993·Granted Feb 28, 1995·50 cites·12 claims
- 1184US5191243AOutput logic macrocell with enhanced functional capabilitiesLATTICE SEMICONDUCTOR CORP·Filed 1991·Granted Mar 2, 1993·40 cites·25 claims
- 1283US7038490B1Delay-matched ASIC conversion of a programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted May 2, 2006·26 cites·23 claims
- 1379US4625311AProgrammable array logic circuit with testing and verification circuitryMONOLITHIC MEMORIES INC·Filed 1984·Granted Nov 25, 1986·29 cites·7 claims
- 1477US4595875AShort detector for PROMSMONOLITHIC MEMORIES INC·Filed 1983·Granted Jun 17, 1986·25 cites·13 claims
- 1574US6066977AProgrammable output voltage levelsLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted May 23, 2000·29 cites·32 claims
- 1674US5506517AOutput enable structure and method for a programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 1994·Granted Apr 9, 1996·26 cites·20 claims
- 1772US6389321B2Simultaneous wired and wireless remote in-system programming of multiple remote systemsLATTICE SEMICONDUCTOR CORP·Filed 1997·Granted May 14, 2002·75 cites·20 claims
- 1870US6294925B1Programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 1999·Granted Sep 25, 2001·17 cites·10 claims
- 1967US5130574AProgrammable logic device providing product term sharing and steering to the outputs of the programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 1991·Granted Jul 14, 1992·20 cites·7 claims
- 2066US6023570ASequential and simultaneous manufacturing programming of multiple in-system programmable systems through a data networkLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted Feb 8, 2000·47 cites·69 claims
- 2165US4654830AMethod and structure for disabling and replacing defective memory in a PROMMONOLITHIC MEMORIES INC·Filed 1984·Granted Mar 31, 1987·17 cites·29 claims
- 2261US4638189AFast and gate with programmable output polarityMONOLITHIC MEMORIES INC·Filed 1984·Granted Jan 20, 1987·11 cites·16 claims
- 2356US4701695AShort detector for PROMSMONOLITHIC MEMORIES INC·Filed 1986·Granted Oct 20, 1987·15 cites·8 claims
- 2456US4670708AShort detector for fusible link array using a pair of parallel connected reference fusible linksMONOLITHIC MEMORIES INC·Filed 1984·Granted Jun 2, 1987·11 cites·5 claims
- 2551US6133750ACombination of global clock and localized clocksLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted Oct 17, 2000·9 cites·19 claims
- 2648US5329179AArrangement for parallel programming of in-system programmable IC logical devicesLATTICE SEMICONDUCTOR CORP·Filed 1992·Granted Jul 12, 1994·18 cites·6 claims
- 2747US5404055AInput routing poolLATTICE SEMICONDUCTOR CORP·Filed 1993·Granted Apr 4, 1995·8 cites·12 claims
- 2846US6255847B1Programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted Jul 3, 2001·6 cites·12 claims
- 2945US6104207AProgrammable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 1998·Granted Aug 15, 2000·8 cites·51 claims
- 3041US6462576B1Programmable logic deviceLATTICE SEMICONDUCTOR CORP·Filed 2000·Granted Oct 8, 2002·1 cites·12 claims
- 3138US6191609B1Combination of global clock and localized clocksLATTICE SEMICONDUCTOR CORP·Filed 1999·Granted Feb 20, 2001·4 cites·2 claims
- 3238US4634898ATTL buffer circuit incorporating active pull-down transistorMONOLITHIC MEMORIES INC·Filed 1983·Granted Jan 6, 1987·3 cites·6 claims
- 3336US6903573B1Programmable logic device with enhanced wide input product term cascadingLATTICE SEMICONDUCTOR CORP·Filed 2003·Granted Jun 7, 2005·0 cites·12 claims
- 3435US6278311B1Method for minimizing instantaneous currents when driving bus signalsLATTICE SEMICONDUCTOR CORP·Filed 1999·Granted Aug 21, 2001·2 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →