Inventor · disambiguated record
Teh-Yi J. Chen
Also filed as: CHEN TEH-YI J · CHEN TEH-YI JAMES
8 granted patents·333 citations·filing 1984–1996
90Inventor score
Top patents by PatentIndex Score
8 records- 0193US5424567AProtected programmable transistor with reduced parasitic capacitances and method of fabricationPHILIPS CORP·Filed 1991·Granted Jun 13, 1995·108 cites·3 claims
- 0278US4786609AMethod of fabricating field-effect transistor utilizing improved gate sidewall spacersNORTH AMERICAN PHILIPS CORP SI·Filed 1987·Granted Nov 22, 1988·55 cites·15 claims
- 0375US5766991ACMOS process utilizing disposable silicon nitride spacers for making lightly doped drainPHILIPS CORP·Filed 1996·Granted Jun 16, 1998·51 cites·6 claims
- 0469US5110757AFormation of composite monosilicon/polysilicon layer using reduced-temperature two-step silicon depositionPHILIPS CORP·Filed 1990·Granted May 5, 1992·60 cites·25 claims
- 0568US5486480AMethod of fabrication of protected programmable transistor with reduced parasitic capacitancesPHILIPS CORP·Filed 1994·Granted Jan 23, 1996·25 cites·3 claims
- 0654US5008212ASelective asperity definition technique suitable for use in fabricating floating-gate transistorCHEN TEH YI J·Filed 1988·Granted Apr 16, 1991·17 cites·20 claims
- 0743US4584205AMethod for growing an oxide layer on a silicon surfaceSIGNETICS CORP·Filed 1984·Granted Apr 22, 1986·13 cites·9 claims
- 0830US4653173AMethod of manufacturing an insulated gate field effect deviceSIGNETICS CORP·Filed 1985·Granted Mar 31, 1987·4 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →