Inventor · disambiguated record
Sebastian Ziesler
Also filed as: ZIESLER SEBASTIAN · ZIESLER SEBASTIAN H · ZIESLER SEBASTIAN HAVLUJ
8 granted patents·3 pending applications·142 citations·filing 1999–2024
86Inventor score
Top patents by PatentIndex Score
11 records- 0195US7782805B1High speed packet interface and methodBELHADJ MED·Filed 2006·Granted Aug 24, 2010·98 cites·50 claims
- 0289US8340005B1High speed packet interface and methodBELHADJ MED·Filed 2010·Granted Dec 25, 2012·18 cites·2 claims
- 0385US7787502B1Port multiplexing apparatus and methodsCORTINA SYSTEMS INC·Filed 2006·Granted Aug 31, 2010·12 cites·22 claims
- 0459US8095846B2Data coding apparatus and methodsZIESLER SEBASTIAN·Filed 2007·Granted Jan 10, 2012·4 cites·15 claims
- 0556US12476655B2Low-density parity check decoderCORTINA ACCESS INC·Filed 2024·Granted Nov 18, 2025·0 cites·16 claims
- 0651US2025117284A1Low-density parity check decoderCORTINA ACCESS INC·Filed 2024·Application pending·0 cites
- 0747US9570865B1Electrical box having a removable module with a charging connectorZIESLER SEBASTIAN H·Filed 2015·Granted Feb 14, 2017·1 cites·20 claims
- 0845US2023237239A1Circuit unit having adjustable driving strength capability in chip and method thereofCORTINA ACCESS INC·Filed 2022·Application pending·0 cites
- 0943US2005262329A1Processor architecture for executing two different fixed-length instruction setsHITACHI LTD·Filed 2003·Application pending·0 cites
- 1040US6446197B1Two modes for executing branch instructions of different lengths and use of branch control instruction and register set loaded with target instructionsHITACHI LTD·Filed 1999·Granted Sep 3, 2002·9 cites·20 claims
- 1138US8510626B2Data coding apparatus and methodsZIESLER SEBASTIAN·Filed 2011·Granted Aug 13, 2013·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →