Inventor · disambiguated record
Itamar Kazachinsky
Also filed as: KAZACHINSKY ITAMAR · KAZACHINSKY ITAMAR S
13 granted patents·168 citations·filing 1991–2018
91Inventor score
Top patents by PatentIndex Score
13 records- 0193US9910475B2Processor core power event tracingINTEL CORP·Filed 2014·Granted Mar 6, 2018·47 cites·19 claims
- 0281US9262163B2Real time instruction trace processors, methods, and systemsINTEL CORP·Filed 2012·Granted Feb 16, 2016·5 cites·29 claims
- 0378US7721129B2Method and apparatus for reducing clock frequency during low workload periodsINTEL CORP·Filed 2006·Granted May 18, 2010·8 cites·11 claims
- 0477US6570573B1Method and apparatus for pre-fetching vertex buffers in a computer systemINTEL CORP·Filed 2000·Granted May 27, 2003·17 cites·33 claims
- 0575US7051227B2Method and apparatus for reducing clock frequency during low workload periodsINTEL CORP·Filed 2002·Granted May 23, 2006·23 cites·13 claims
- 0668US9612938B2Providing status of a processing device with periodic synchronization point in instruction tracing systemINTEL CORP·Filed 2013·Granted Apr 4, 2017·2 cites·24 claims
- 0763US8281083B2Device, system and method of generating an execution instruction based on a memory-access instructionNAVEH ALON·Filed 2005·Granted Oct 2, 2012·3 cites·20 claims
- 0862US5301298AProcessor for multiple cache coherent protocolsINTEL CORP·Filed 1991·Granted Apr 5, 1994·40 cites·10 claims
- 0954US10656697B2Processor core power event tracingINTEL CORP·Filed 2018·Granted May 19, 2020·0 cites·20 claims
- 1054US9696997B2Real time instruction trace processors, methods, and systemsINTEL CORP·Filed 2016·Granted Jul 4, 2017·0 cites·24 claims
- 1151US5379396AWrite ordering for microprocessor depending on cache hit and write buffer contentINTEL CORP·Filed 1991·Granted Jan 3, 1995·23 cites·6 claims
- 1248US9189360B2Processor that records tracing data in non contiguous system memory slicesSTRONG BEEMAN C·Filed 2013·Granted Nov 17, 2015·0 cites·20 claims
- 1348US9063729B2Device, system and method of generating an execution instruction based on a memory-access instructionNAVEH ALON·Filed 2012·Granted Jun 23, 2015·0 cites·17 claims
Join the waitlist — get patent alerts
Get an alert when Itamar Kazachinsky files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →