Inventor · disambiguated record
Yee Chong Wong
Also filed as: WONG YEE CHONG
2 granted patents·36 citations·filing 2000–2001
61Inventor score
Files withCHARTERED SEMICONDUCTOR MFG2
Top patents by PatentIndex Score
2 records- 0191US6406994B1Triple-layered low dielectric constant dielectric dual damascene approachCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Jun 18, 2002·31 cites·20 claims
- 0250US6803314B2Double-layered low dielectric constant dielectric dual damascene methodCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Oct 12, 2004·5 cites·10 claims
Join the waitlist — get patent alerts
Get an alert when Yee Chong Wong files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →