Inventor · disambiguated record
Nathan Tuck
Also filed as: TUCK NATHAN · TUCK NATHAN D · TUCK NATHAN DANIEL
17 granted patents·2 pending applications·1,779 citations·filing 1998–2018
96Inventor score
Top patents by PatentIndex Score
19 records- 0198US6717576B1Deferred shading graphics pipeline processor having advanced featuresAPPLE COMPUTER·Filed 1999·Granted Apr 6, 2004·297 cites·30 claims
- 0298US6597363B1Graphics processor with deferred shadingAPPLE COMPUTER·Filed 1999·Granted Jul 22, 2003·322 cites·29 claims
- 0397US8356144B2Vector processor systemHESSEL RICHARD·Filed 2009·Granted Jan 15, 2013·411 cites·18 claims
- 0497US7808503B2Deferred shading graphics pipeline processor having advanced featuresAPPLE INC·Filed 2006·Granted Oct 5, 2010·77 cites·35 claims
- 0597US7167181B2Deferred shading graphics pipeline processor having advanced featuresAPPLE COMPUTER·Filed 2003·Granted Jan 23, 2007·121 cites·10 claims
- 0697US6268875B1Deferred shading graphics pipeline processorAPPLE COMPUTER·Filed 2000·Granted Jul 31, 2001·119 cites·31 claims
- 0797US6229553B1Deferred shading graphics pipeline processorAPPLE COMPUTER·Filed 1999·Granted May 8, 2001·203 cites·2 claims
- 0895US8375368B2Systems and methods for profiling an application running on a parallel-processing computer systemGOOGLE INC·Filed 2007·Granted Feb 12, 2013·50 cites·24 claims
- 0993US6771264B1Method and apparatus for performing tangent space lighting and bump mapping in a deferred shading graphics processorAPPLE COMPUTER·Filed 1998·Granted Aug 3, 2004·111 cites·35 claims
- 1092US10642744B2Memory type which is cacheable yet inaccessible by speculative instructionsNVIDIA CORP·Filed 2018·Granted May 5, 2020·21 cites·24 claims
- 1187US8381202B2Runtime system for executing an application in a parallel-processing computer systemGOOGLE INC·Filed 2007·Granted Feb 19, 2013·18 cites·20 claims
- 1286US7543119B2Vector processorHESSEL RICHARD EDWARD·Filed 2006·Granted Jun 2, 2009·18 cites·15 claims
- 1376US9384001B2Custom chaining stubs for instruction code translationHERTZBERG BEN·Filed 2012·Granted Jul 5, 2016·5 cites·20 claims
- 1466US10146545B2Translation address cache for a microprocessorSEGELKEN ROSS·Filed 2012·Granted Dec 4, 2018·3 cites·14 claims
- 1565US10108424B2Profiling code portions to generate translationsNVIDIA CORP·Filed 2013·Granted Oct 23, 2018·2 cites·21 claims
- 1655US9880846B2Improving hit rate of code translation redirection table with replacement strategy based on usage history table of evicted entriesTUCK NATHAN·Filed 2012·Granted Jan 30, 2018·1 cites·20 claims
- 1754US10324725B2Fault detection in instruction translationsNVIDIA CORP·Filed 2018·Granted Jun 18, 2019·0 cites·16 claims
- 1853US2013185496A1Vector Processing SystemHESSEL CONNIE·Filed 2012·Application pending·0 cites
- 1949US2014189310A1Fault detection in instruction translationsNVIDIA CORP·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →