Inventor · disambiguated record
Subramanian K. Iyer
Also filed as: IYER SUBRAMANIAN K
8 granted patents·53 citations·filing 2003–2009
86Inventor score
Technology areasG06F
Top patents by PatentIndex Score
8 records- 0178US7216312B2Determining one or more reachable states in a circuit using distributed computing and one or more partitioned data structuresFUJITSU LTD·Filed 2003·Granted May 8, 2007·16 cites·19 claims
- 0276US7546563B2Validating one or more circuits using one of more gridsFUJITSU LTD·Filed 2005·Granted Jun 9, 2009·8 cites·17 claims
- 0374US7028279B2Circuit verificationFUJITSU LTD·Filed 2003·Granted Apr 11, 2006·13 cites·37 claims
- 0467US6904578B2System and method for verifying a plurality of states associated with a target circuitFUJITSU LTD·Filed 2003·Granted Jun 7, 2005·8 cites·30 claims
- 0566US7571403B2Circuit verificationFUJITSU LTD·Filed 2006·Granted Aug 4, 2009·4 cites·4 claims
- 0665US8181132B2Validating one or more circuits using one or more gridsJAIN JAWAHAR·Filed 2009·Granted May 15, 2012·3 cites·24 claims
- 0751US7788556B2System and method for evaluating an erroneous state associated with a target circuitFUJITSU LTD·Filed 2003·Granted Aug 31, 2010·1 cites·21 claims
- 0845US7032197B2System and method for executing image computation associated with a target circuitFUJITSU LTD·Filed 2003·Granted Apr 18, 2006·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →