Inventor · disambiguated record
Timothy G. Mcnamara
Also filed as: MCNAMARA TIMOTHY G · MCNAMARA TIMOTHY GERARD
32 granted patents·2 pending applications·651 citations·filing 1986–2016
97Inventor score
Top patents by PatentIndex Score
34 records- 0192US6311313B1X-Y grid tree clock distribution network with tunable tree and grid networksIBM·Filed 1998·Granted Oct 30, 2001·196 cites·28 claims
- 0286US7382844B2Methods to self-synchronize clocks on multiple chips in a systemIBM·Filed 2005·Granted Jun 3, 2008·19 cites·3 claims
- 0382US9569889B2Hardware management and reconstruction using visual graphicsIBM·Filed 2016·Granted Feb 14, 2017·3 cites·1 claims
- 0482US7047466B2Apparatus and method for programmable fuse repair to support dynamic relocate and improved cache testingIBM·Filed 2002·Granted May 16, 2006·29 cites·7 claims
- 0582US6205571B1X-Y grid tree tuning methodIBM·Filed 1998·Granted Mar 20, 2001·104 cites·18 claims
- 0682US4800564AHigh performance clock system error detection and fault isolationIBM·Filed 1986·Granted Jan 24, 1989·45 cites·13 claims
- 0777US5970052AMethod for dynamic bandwidth testingIBM·Filed 1997·Granted Oct 19, 1999·97 cites·13 claims
- 0873US8295419B2Method and apparatus for generating synchronization signals for synchronizing multiple chips in a systemHWANG CHARLIE C·Filed 2010·Granted Oct 23, 2012·4 cites·11 claims
- 0970US10078970B2Hardware management and reconstruction using visual graphicsIBM·Filed 2016·Granted Sep 18, 2018·1 cites·1 claims
- 1070US7826579B2Method and apparatus for generating synchronization signals for synchronizing multiple chips in a systemIBM·Filed 2006·Granted Nov 2, 2010·4 cites·5 claims
- 1168US7129764B2System and method for local generation of a ratio clockIBM·Filed 2005·Granted Oct 31, 2006·4 cites·20 claims
- 1268US6125465AIsolation/removal of faults during LBIST testingIBM·Filed 1998·Granted Sep 26, 2000·29 cites·2 claims
- 1368US5420467AProgrammable delay clock chopper/stretcher with fast recoveryIBM·Filed 1992·Granted May 30, 1995·21 cites·17 claims
- 1467US10078418B2Hardware management and reconstruction using visual graphicsIBM·Filed 2016·Granted Sep 18, 2018·0 cites·1 claims
- 1564US7996715B2Multi nodal computer system and method for handling check stops in the multi nodal computer systemIBM·Filed 2008·Granted Aug 9, 2011·3 cites·7 claims
- 1658US7355460B2Method for locally generating non-integral divided clocks with centralized state machinesIBM·Filed 2006·Granted Apr 8, 2008·1 cites·8 claims
- 1758US6748565B1System and method for adjusting timing pathsIBM·Filed 2000·Granted Jun 8, 2004·6 cites·11 claims
- 1858US6629281B1Method and system for at speed diagnostics and bit fail mappingIBM·Filed 2000·Granted Sep 30, 2003·10 cites·8 claims
- 1957US9679411B2Hardware management and reconstruction using visual graphicsIBM·Filed 2014·Granted Jun 13, 2017·0 cites·15 claims
- 2056US8001411B2Generating a local clock domain using dynamic controlsIBM·Filed 2007·Granted Aug 16, 2011·3 cites·20 claims
- 2154US7484118B2Multi nodal computer system and method for handling check stops in the multi nodal computer systemIBM·Filed 2004·Granted Jan 27, 2009·4 cites·3 claims
- 2252US2008191753A1Methods and Systems for Locally Generating Non-Integral Divided Clocks with Centralized State MachinesIBM·Filed 2008·Application pending·0 cites
- 2350US7368958B2Methods and systems for locally generating non-integral divided clocks with centralized state machinesIBM·Filed 2006·Granted May 6, 2008·0 cites·12 claims
- 2449US7146520B2Method and apparatus for controlling clocks in a processor with mirrored unitsIBM·Filed 2003·Granted Dec 5, 2006·2 cites·9 claims
- 2549US5905410ALock/unlock indicator for PLL circuitsIBM·Filed 1998·Granted May 18, 1999·15 cites·4 claims
- 2647US7437637B2Apparatus and method for programmable fuse repair to support dynamic relocate and improved cache testingIBM·Filed 2006·Granted Oct 14, 2008·1 cites·3 claims
- 2747US6990076B1Synchronous bi-directional data transfer having increased bandwidth and scan test featuresMCNAMARA TIMOTHY G·Filed 1999·Granted Jan 24, 2006·15 cites·17 claims
- 2846US6058488AMethod of reducing computer module cycle timeIBM·Filed 1998·Granted May 2, 2000·12 cites·9 claims
- 2942US6629280B1Method and apparatus for delaying ABIST startIBM·Filed 2000·Granted Sep 30, 2003·3 cites·6 claims
- 3040US6081904AMethod for insuring data integrity during transfersIBM·Filed 1998·Granted Jun 27, 2000·13 cites·12 claims
- 3136US2006195288A1Method for at speed testing of multi-clock domain chipsIBM·Filed 2005·Application pending·0 cites
- 3233US8090929B2Generating clock signals for coupled ASIC chips in processor interface with X and Y logic operable in functional and scanning modesMAGEE JEFFREY A·Filed 2008·Granted Jan 3, 2012·0 cites·20 claims
- 3333US5966417ACycle alignment circuit for multicycle time systemsIBM·Filed 1997·Granted Oct 12, 1999·5 cites·8 claims
- 3429US6195757B1Method for supporting 1½ cycle data paths via PLL based clock systemIBM·Filed 1998·Granted Feb 27, 2001·2 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →