Inventor · disambiguated record
Blaise Fanning
Also filed as: FANNING BLAISE · FANNING BLAISE B
88 granted patents·16 pending applications·1,408 citations·filing 1991–2022
99Inventor score
Files withINTEL CORP70FANNING BLAISE7LAKSHMANAMURTHY SRIDHAR7DIGITAL EQUIPMENT CORP4PUTHIYEDATH LEENA K3
Top patents by PatentIndex Score
104 records- 0198US6523092B1Cache line replacement policy enhancement to avoid memory page thrashingINTEL CORP·Filed 2000·Granted Feb 18, 2003·253 cites·20 claims
- 0297US7536473B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2002·Granted May 19, 2009·106 cites·27 claims
- 0396US8819306B2General input/output architecture with PCI express protocol with credit-based flow controlINTEL CORP·Filed 2012·Granted Aug 26, 2014·20 cites·22 claims
- 0494US7152128B2General input/output architecture, protocol and related methods to manage data integrityINTEL CORP·Filed 2002·Granted Dec 19, 2006·85 cites·31 claims
- 0593US9736071B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2014·Granted Aug 15, 2017·9 cites·24 claims
- 0693US9088495B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2012·Granted Jul 21, 2015·10 cites·24 claims
- 0793US8566473B2General input/output architecture, protocol and related methods to implement flow controlAJANOVIC JASMIN·Filed 2009·Granted Oct 22, 2013·16 cites·23 claims
- 0891US9565106B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2013·Granted Feb 7, 2017·7 cites·21 claims
- 0991US7353313B2General input/output architecture, protocol and related methods to manage data integrityINTEL CORP·Filed 2006·Granted Apr 1, 2008·15 cites·24 claims
- 1090US9049125B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2012·Granted Jun 2, 2015·7 cites·6 claims
- 1190US8929373B2Sending packets with expanded headersLAKSHMANAMURTHY SRIDHAR·Filed 2011·Granted Jan 6, 2015·13 cites·18 claims
- 1290US8874976B2Providing error handling support to legacy devicesLAKSHMANAMURTHY SRIDHAR·Filed 2011·Granted Oct 28, 2014·13 cites·11 claims
- 1390US8711875B2Aggregating completion messages in a sideband interfaceLAKSHMANAMURTHY SRIDHAR·Filed 2011·Granted Apr 29, 2014·12 cites·16 claims
- 1490US5321810AAddress method for computer graphics systemDIGITAL EQUIPMENT CORP·Filed 1991·Granted Jun 14, 1994·93 cites·11 claims
- 1590US5315698AMethod and apparatus for varying command length in a computer graphics systemDIGITAL EQUIPMENT CORP·Filed 1991·Granted May 24, 1994·93 cites·8 claims
- 1689US9529708B2Apparatus for configuring partitions within phase change memory of tablet computer with integrated memory controller emulating mass storage to storage driver based on request from softwarePUTHIYEDATH LEENA K·Filed 2011·Granted Dec 27, 2016·14 cites·15 claims
- 1789US9071528B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2012·Granted Jun 30, 2015·6 cites·20 claims
- 1889US8713234B2Supporting multiple channels of a single interfaceLAKSHMANAMURTHY SRIDHAR·Filed 2011·Granted Apr 29, 2014·12 cites·20 claims
- 1988US8775700B2Issuing requests to a fabricLAKSHMANAMURTHY SRIDHAR·Filed 2011·Granted Jul 8, 2014·10 cites·10 claims
- 2088US8713240B2Providing multiple decode options for a system-on-chip (SoC) fabricLAKSHMANAMURTHY SRIDHAR·Filed 2011·Granted Apr 29, 2014·10 cites·21 claims
- 2187US9860173B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2013·Granted Jan 2, 2018·4 cites·24 claims
- 2287US9053251B2Providing a sideband message interface for system on a chip (SoC)ADLER ROBERT P·Filed 2011·Granted Jun 9, 2015·14 cites·19 claims
- 2385US10241710B2Multi-level memory with direct accessINTEL CORP·Filed 2017·Granted Mar 26, 2019·4 cites·28 claims
- 2485US9678666B2Techniques to configure a solid state drive to operate in a storage mode or a memory modeINTEL CORP·Filed 2015·Granted Jun 13, 2017·3 cites·24 claims
- 2585US9190124B2Multi-level memory with direct accessFANNING BLAISE·Filed 2011·Granted Nov 17, 2015·7 cites·36 claims
- 2684US9734079B2Hybrid exclusive multi-level memory architecture with memory managementINTEL CORP·Filed 2013·Granted Aug 15, 2017·9 cites·27 claims
- 2784US8805926B2Common idle state, active state and credit management for an interfaceLAKSHMANAMURTHY SRIDHAR·Filed 2011·Granted Aug 12, 2014·7 cites·12 claims
- 2883US9098402B2Techniques to configure a solid state drive to operate in a storage mode or a memory modeINTEL CORP·Filed 2012·Granted Aug 4, 2015·5 cites·26 claims
- 2983US9075929B2Issuing requests to a fabricINTEL CORP·Filed 2014·Granted Jul 7, 2015·5 cites·23 claims
- 3083US6918060B2Bounding data transmission latency based upon link loading and arrangementINTEL CORP·Filed 2001·Granted Jul 12, 2005·32 cites·24 claims
- 3182US9430151B2Multi-level memory with direct accessINTEL CORP·Filed 2015·Granted Aug 30, 2016·2 cites·26 claims
- 3281US10055360B2Apparatus and method for shared least recently used (LRU) policy between multiple cache levelsINTEL CORP·Filed 2015·Granted Aug 21, 2018·3 cites·25 claims
- 3381US6330639B1Method and apparatus for dynamically changing the sizes of pools that control the power consumption levels of memory devicesINTEL CORP·Filed 1999·Granted Dec 11, 2001·100 cites·49 claims
- 3481US5315696AGraphics command processing method in a computer graphics systemDIGITAL EQUIPMENT CORP·Filed 1991·Granted May 24, 1994·58 cites·3 claims
- 3581US5313577ATranslation of virtual addresses in a computer graphics systemDIGITAL EQUIPMENT CORP·Filed 1991·Granted May 17, 1994·61 cites·6 claims
- 3680US9836424B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2013·Granted Dec 5, 2017·5 cites·15 claims
- 3779US9658978B2Providing multiple decode options for a system-on-chip (SoC) fabricINTEL CORP·Filed 2014·Granted May 23, 2017·4 cites·30 claims
- 3879US6918001B2Point-to-point busing and arrangementINTEL CORP·Filed 2002·Granted Jul 12, 2005·27 cites·19 claims
- 3976US6968410B2Multi-threaded processing of system management interruptsINTEL CORP·Filed 2001·Granted Nov 22, 2005·21 cites·30 claims
- 4075US9703502B2Multi-level memory with direct accessINTEL CORP·Filed 2016·Granted Jul 11, 2017·1 cites·26 claims
- 4174US10504591B2Adaptive configuration of non-volatile memoryINTEL CORP·Filed 2018·Granted Dec 10, 2019·2 cites·31 claims
- 4274US9602408B2General input/output architecture, protocol and related methods to implement flow controlINTEL CORP·Filed 2013·Granted Mar 21, 2017·1 cites·17 claims
- 4374US6625695B2Cache line replacement policy enhancement to avoid memory page thrashingINTEL CORP·Filed 2002·Granted Sep 23, 2003·16 cites·20 claims
- 4472US9542336B2Isochronous agent data pinning in a multi-level memory systemINTEL CORP·Filed 2013·Granted Jan 10, 2017·3 cites·20 claims
- 4572US6880111B2Bounding data transmission latency based upon a data transmission event and arrangementINTEL CORP·Filed 2001·Granted Apr 12, 2005·16 cites·38 claims
- 4672US6650586B1Circuit and system for DRAM refresh with scoreboard methodologyINTEL CORP·Filed 2000·Granted Nov 18, 2003·19 cites·26 claims
- 4771US10001953B2System for configuring partitions within non-volatile random access memory (NVRAM) as a replacement for traditional mass storageINTEL CORP·Filed 2016·Granted Jun 19, 2018·1 cites·18 claims
- 4871US9852069B2RAM disk using non-volatile random access memoryINTEL CORP·Filed 2016·Granted Dec 26, 2017·1 cites·16 claims
- 4971US9213666B2Providing a sideband message interface for system on a chip (SoC)INTEL CORP·Filed 2014·Granted Dec 15, 2015·2 cites·24 claims
- 5068US9535860B2Arbitrating memory accesses via a shared memory fabricINTEL CORP·Filed 2013·Granted Jan 3, 2017·2 cites·30 claims
Showing the top 50 of 104 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →