Inventor · disambiguated record
Hebbalalu S. Ramagopal
Also filed as: RAMAGOPAL HEBBALALU S · RAMAGOPAL HEBBALALU SURYAPRAKA
7 granted patents·1 pending application·281 citations·filing 1996–2003
88Inventor score
Top patents by PatentIndex Score
8 records- 0185US6446181B1System having a configurable cache/SRAM memoryINTEL CORP·Filed 2000·Granted Sep 3, 2002·43 cites·19 claims
- 0278US6473837B1Snoop resynchronization mechanism to preserve read orderingADVANCED MICRO DEVICES INC·Filed 1999·Granted Oct 29, 2002·90 cites·27 claims
- 0373US6473832B1Load/store unit having pre-cache and post-cache queues for low latency load memory operationsADVANCED MICRO DEVICES INC·Filed 1999·Granted Oct 29, 2002·66 cites·23 claims
- 0473US5838943AApparatus for speculatively storing and restoring data to a cache memoryADVANCED MICRO DEVICES INC·Filed 1996·Granted Nov 17, 1998·57 cites·40 claims
- 0565US6898690B2Multi-tiered memory bank having different data buffer sizes with a programmable bank selectANALOG DEVICES INC·Filed 2003·Granted May 24, 2005·9 cites·6 claims
- 0664US6606684B1Multi-tiered memory bank having different data buffer sizes with a programmable bank selectINTEL CORP·Filed 2000·Granted Aug 12, 2003·9 cites·9 claims
- 0752US6963962B2Memory system for supporting multiple parallel accesses at very high frequenciesANALOG DEVICES INC·Filed 2002·Granted Nov 8, 2005·7 cites·12 claims
- 0840US2003196072A1Digital signal processor architecture for high computation speedFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →